From: Chris Lattner <sabre@nondot.org>
Date: Thu, 8 Jun 2006 18:27:11 +0000 (+0000)
Subject: Fix X86/inline-asm.ll:test2, a case where an input value was implicitly
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=0c48fd4610cc7a90a998428c93a0c68246e79e57;p=oota-llvm.git

Fix X86/inline-asm.ll:test2, a case where an input value was implicitly
truncated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28733 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 57f74468ada..0a9cb637b47 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1804,9 +1804,12 @@ void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
     // If there is a single register and the types differ, this must be
     // a promotion.
     if (RegVT != ValueVT) {
-      if (MVT::isInteger(RegVT))
-        Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
-      else
+      if (MVT::isInteger(RegVT)) {
+        if (RegVT < ValueVT)
+          Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val);
+        else
+          Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
+      } else
         Val = DAG.getNode(ISD::FP_EXTEND, RegVT, Val);
     }
     Chain = DAG.getCopyToReg(Chain, Regs[0], Val, Flag);