From: Evan Cheng Date: Sun, 25 Feb 2007 09:47:31 +0000 (+0000) Subject: Add an assertion. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=0badfea274f9612780caccbad6e1870f39ed9f40;p=oota-llvm.git Add an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34596 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 0938e3a04e6..9135edcfb9e 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -76,10 +76,12 @@ void RegScavenger::forward() { const MachineOperand &MO = MI->getOperand(i); if (!MO.isReg() || !MO.isDef()) continue; + unsigned Reg = MO.getReg(); // Skip two-address destination operand. - if (TID->findTiedToSrcOperand(i) != -1) + if (TID->findTiedToSrcOperand(i) != -1) { + assert(isUsed(Reg)); continue; - unsigned Reg = MO.getReg(); + } assert(isUnused(Reg) || isReserved(Reg)); if (!MO.isDead()) setUsed(Reg);