From: Kevin Enderby Date: Thu, 21 Oct 2010 17:16:46 +0000 (+0000) Subject: More tweaks to X86 instructions to allow the 'w' suffix in places it makes X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=0b9325c97d031ab0e9a240d69a2be11ec1559e37;p=oota-llvm.git More tweaks to X86 instructions to allow the 'w' suffix in places it makes sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 4aad817f13d..975d46fadcd 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -703,6 +703,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, .Case("fwait", "wait") .Case("movzx", "movzb") // FIXME: Not correct. .Case("fildq", "fildll") + .Case("ud2a", "ud2") .Default(Name); // FIXME: Hack to recognize cmp{ss,sd,ps,pd}. @@ -1175,9 +1176,10 @@ MatchAndEmitInstruction(SMLoc IDLoc, // First, handle aliases that expand to multiple instructions. // FIXME: This should be replaced with a real .td file alias mechanism. - if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" || + if (Op->getToken() == "fstsw" || Op->getToken() == "fstsww" || + Op->getToken() == "fstcw" || Op->getToken() == "fstcww" || Op->getToken() == "finit" || Op->getToken() == "fsave" || - Op->getToken() == "fstenv") { + Op->getToken() == "fstenv" || Op->getToken() == "fclex") { MCInst Inst; Inst.setOpcode(X86::WAIT); Out.EmitInstruction(Inst); @@ -1187,8 +1189,11 @@ MatchAndEmitInstruction(SMLoc IDLoc, .Case("finit", "fninit") .Case("fsave", "fnsave") .Case("fstcw", "fnstcw") + .Case("fstcww", "fnstcw") .Case("fstenv", "fnstenv") .Case("fstsw", "fnstsw") + .Case("fstsww", "fnstsw") + .Case("fclex", "fnclex") .Default(0); assert(Repl && "Unknown wait-prefixed instruction"); delete Operands[0]; diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td index 0087e4892bb..57634d3c0fb 100644 --- a/lib/Target/X86/X86InstrFPStack.td +++ b/lib/Target/X86/X86InstrFPStack.td @@ -340,7 +340,7 @@ def FCOMP64m : FPI<0xDC, MRM3m, (outs), (ins f64mem:$src), "fcomp{l}\t$src">; def FRSTORm : FPI<0xDD, MRM4m, (outs f32mem:$dst), (ins), "frstor\t$dst">; def FSAVEm : FPI<0xDD, MRM6m, (outs f32mem:$dst), (ins), "fnsave\t$dst">; -def FNSTSWm : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw\t$dst">; +def FNSTSWm : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw{w}\t$dst">; def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">; @@ -600,12 +600,12 @@ def FNSTSW8r : I<0xE0, RawFrm, // AX = fp flags (outs), (ins), "fnstsw %ax", []>, DF; def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world - (outs), (ins i16mem:$dst), "fnstcw\t$dst", + (outs), (ins i16mem:$dst), "fnstcw{w}\t$dst", [(X86fp_cwd_get16 addr:$dst)]>; let mayLoad = 1 in def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16] - (outs), (ins i16mem:$dst), "fldcw\t$dst", []>; + (outs), (ins i16mem:$dst), "fldcw{w}\t$dst", []>; // FPU control instructions def FNINIT : I<0xE3, RawFrm, (outs), (ins), "fninit", []>, DB; diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 48b6d6ecf07..835794d5d40 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -310,13 +310,13 @@ def LGS64rm : RI<0xb5, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src), def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg), - "verr\t$seg", []>, TB; + "verr{w}\t$seg", []>, TB; def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg), - "verr\t$seg", []>, TB; + "verr{w}\t$seg", []>, TB; def VERWr : I<0x00, MRM5r, (outs), (ins GR16:$seg), - "verw\t$seg", []>, TB; + "verw{w}\t$seg", []>, TB; def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), - "verw\t$seg", []>, TB; + "verw{w}\t$seg", []>, TB; //===----------------------------------------------------------------------===// // Descriptor-table support instructions diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s index f97fc4bee03..856a59d2800 100644 --- a/test/MC/X86/x86-32-coverage.s +++ b/test/MC/X86/x86-32-coverage.s @@ -474,10 +474,10 @@ // CHECK: fabs fabs -// CHECK: fldcw 3735928559(%ebx,%ecx,8) +// CHECK: fldcww 3735928559(%ebx,%ecx,8) fldcw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fnstcw 3735928559(%ebx,%ecx,8) +// CHECK: fnstcww 3735928559(%ebx,%ecx,8) fnstcw 0xdeadbeef(%ebx,%ecx,8) // CHECK: rdtsc @@ -3702,35 +3702,35 @@ // CHECK: encoding: [0x0f,0x00,0x0d,0xed,0x7e,0x00,0x00] strw 0x7eed -// CHECK: verr %bx +// CHECK: verrw %bx // CHECK: encoding: [0x0f,0x00,0xe3] verr %bx -// CHECK: verr 3735928559(%ebx,%ecx,8) +// CHECK: verrw 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0x0f,0x00,0xa4,0xcb,0xef,0xbe,0xad,0xde] verr 0xdeadbeef(%ebx,%ecx,8) -// CHECK: verr 3133065982 +// CHECK: verrw 3133065982 // CHECK: encoding: [0x0f,0x00,0x25,0xfe,0xca,0xbe,0xba] verr 0xbabecafe -// CHECK: verr 305419896 +// CHECK: verrw 305419896 // CHECK: encoding: [0x0f,0x00,0x25,0x78,0x56,0x34,0x12] verr 0x12345678 -// CHECK: verw %bx +// CHECK: verww %bx // CHECK: encoding: [0x0f,0x00,0xeb] verw %bx -// CHECK: verw 3735928559(%ebx,%ecx,8) +// CHECK: verww 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0x0f,0x00,0xac,0xcb,0xef,0xbe,0xad,0xde] verw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: verw 3133065982 +// CHECK: verww 3133065982 // CHECK: encoding: [0x0f,0x00,0x2d,0xfe,0xca,0xbe,0xba] verw 0xbabecafe -// CHECK: verw 305419896 +// CHECK: verww 305419896 // CHECK: encoding: [0x0f,0x00,0x2d,0x78,0x56,0x34,0x12] verw 0x12345678 @@ -4290,39 +4290,39 @@ // CHECK: encoding: [0xdb,0xe3] fninit -// CHECK: fldcw 3735928559(%ebx,%ecx,8) +// CHECK: fldcww 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xd9,0xac,0xcb,0xef,0xbe,0xad,0xde] fldcw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fldcw 3133065982 +// CHECK: fldcww 3133065982 // CHECK: encoding: [0xd9,0x2d,0xfe,0xca,0xbe,0xba] fldcw 0xbabecafe -// CHECK: fldcw 305419896 +// CHECK: fldcww 305419896 // CHECK: encoding: [0xd9,0x2d,0x78,0x56,0x34,0x12] fldcw 0x12345678 -// CHECK: fnstcw 3735928559(%ebx,%ecx,8) +// CHECK: fnstcww 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xd9,0xbc,0xcb,0xef,0xbe,0xad,0xde] fnstcw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fnstcw 3133065982 +// CHECK: fnstcww 3133065982 // CHECK: encoding: [0xd9,0x3d,0xfe,0xca,0xbe,0xba] fnstcw 0xbabecafe -// CHECK: fnstcw 305419896 +// CHECK: fnstcww 305419896 // CHECK: encoding: [0xd9,0x3d,0x78,0x56,0x34,0x12] fnstcw 0x12345678 -// CHECK: fnstsw 3735928559(%ebx,%ecx,8) +// CHECK: fnstsww 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xdd,0xbc,0xcb,0xef,0xbe,0xad,0xde] fnstsw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fnstsw 3133065982 +// CHECK: fnstsww 3133065982 // CHECK: encoding: [0xdd,0x3d,0xfe,0xca,0xbe,0xba] fnstsw 0xbabecafe -// CHECK: fnstsw 305419896 +// CHECK: fnstsww 305419896 // CHECK: encoding: [0xdd,0x3d,0x78,0x56,0x34,0x12] fnstsw 0x12345678 @@ -13553,28 +13553,28 @@ // CHECK: strw 32493 strw 0x7eed -// CHECK: verr %bx +// CHECK: verrw %bx verr %bx -// CHECK: verr 3735928559(%ebx,%ecx,8) +// CHECK: verrw 3735928559(%ebx,%ecx,8) verr 0xdeadbeef(%ebx,%ecx,8) -// CHECK: verr 3133065982 +// CHECK: verrw 3133065982 verr 0xbabecafe -// CHECK: verr 305419896 +// CHECK: verrw 305419896 verr 0x12345678 -// CHECK: verw %bx +// CHECK: verww %bx verw %bx -// CHECK: verw 3735928559(%ebx,%ecx,8) +// CHECK: verww 3735928559(%ebx,%ecx,8) verw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: verw 3133065982 +// CHECK: verww 3133065982 verw 0xbabecafe -// CHECK: verw 305419896 +// CHECK: verww 305419896 verw 0x12345678 // CHECK: fld %st(2) @@ -14012,31 +14012,31 @@ // CHECK: fninit fninit -// CHECK: fldcw 3735928559(%ebx,%ecx,8) +// CHECK: fldcww 3735928559(%ebx,%ecx,8) fldcw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fldcw 3133065982 +// CHECK: fldcww 3133065982 fldcw 0xbabecafe -// CHECK: fldcw 305419896 +// CHECK: fldcww 305419896 fldcw 0x12345678 -// CHECK: fnstcw 3735928559(%ebx,%ecx,8) +// CHECK: fnstcww 3735928559(%ebx,%ecx,8) fnstcw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fnstcw 3133065982 +// CHECK: fnstcww 3133065982 fnstcw 0xbabecafe -// CHECK: fnstcw 305419896 +// CHECK: fnstcww 305419896 fnstcw 0x12345678 -// CHECK: fnstsw 3735928559(%ebx,%ecx,8) +// CHECK: fnstsww 3735928559(%ebx,%ecx,8) fnstsw 0xdeadbeef(%ebx,%ecx,8) -// CHECK: fnstsw 3133065982 +// CHECK: fnstsww 3133065982 fnstsw 0xbabecafe -// CHECK: fnstsw 305419896 +// CHECK: fnstsww 305419896 fnstsw 0x12345678 // CHECK: fnclex diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s index c474b1c589c..4c59aa78904 100644 --- a/test/MC/X86/x86-32.s +++ b/test/MC/X86/x86-32.s @@ -702,3 +702,67 @@ pshufw $90, %mm4, %mm0 // CHECK: sidt 4(%eax) // CHECK: encoding: [0x0f,0x01,0x48,0x04] sidtl 4(%eax) + +// CHECK: verrw 2(%eax) +// CHECK: encoding: [0x0f,0x00,0x60,0x02] + verrw 2(%eax) + +// CHECK: verrw 2(%eax) +// CHECK: encoding: [0x0f,0x00,0x60,0x02] + verr 2(%eax) + +// CHECK: verrw %bx +// CHECK: encoding: [0x0f,0x00,0xe3] + verrw %bx + +// CHECK: verrw %bx +// CHECK: encoding: [0x0f,0x00,0xe3] + verr %bx + +// CHECK: verww 2(%eax) +// CHECK: encoding: [0x0f,0x00,0x68,0x02] + verww 2(%eax) + +// CHECK: verww 2(%eax) +// CHECK: encoding: [0x0f,0x00,0x68,0x02] + verw 2(%eax) + +// CHECK: verww %bx +// CHECK: encoding: [0x0f,0x00,0xeb] + verww %bx + +// CHECK: verww %bx +// CHECK: encoding: [0x0f,0x00,0xeb] + verw %bx + +// CHECK: fldcww 6(%ecx) +// CHECK: encoding: [0xd9,0x69,0x06] + fldcw 6(%ecx) + +// CHECK: fldcww 6(%ecx) +// CHECK: encoding: [0xd9,0x69,0x06] + fldcww 6(%ecx) + +// CHECK: fnstcww 6(%ecx) +// CHECK: encoding: [0xd9,0x79,0x06] + fnstcw 6(%ecx) + +// CHECK: fnstcww 6(%ecx) +// CHECK: encoding: [0xd9,0x79,0x06] + fnstcww 6(%ecx) + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstsw %ax + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstsww 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fclex + +// CHECK: ud2 +// CHECK: encoding: [0x0f,0x0b] + ud2a diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index a115b342aa8..2df3d130bd8 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -427,17 +427,17 @@ fstsw %ax // CHECK: fnstsw %ax fstsw (%rax) // CHECK: wait -// CHECK: fnstsw (%rax) +// CHECK: fnstsww (%rax) // PR8259 fstcw (%rsp) // CHECK: wait -// CHECK: fnstcw (%rsp) +// CHECK: fnstcww (%rsp) // PR8259 fstcw (%rsp) // CHECK: wait -// CHECK: fnstcw (%rsp) +// CHECK: fnstcww (%rsp) // PR8258 finit