From: Cameron Zwarich <zwarich@apple.com>
Date: Wed, 16 Mar 2011 20:15:44 +0000 (+0000)
Subject: Add a test for i1 zeroext arguments on x86-64. We currently generate code that
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=0a00615b340b47c6af72998cca35b69fb8e5aa5f;p=oota-llvm.git

Add a test for i1 zeroext arguments on x86-64. We currently generate code that
conforms to the ABI, but DAGCombine could in theory recognize the sequence of
zext asserts and truncates and generate incorrect code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127754 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/bool-args-zext.ll b/test/CodeGen/X86/bool-args-zext.ll
new file mode 100644
index 00000000000..67168d4bf04
--- /dev/null
+++ b/test/CodeGen/X86/bool-args-zext.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CHECK: @bar1
+; CHECK: movzbl
+; CHECK: callq
+define void @bar1(i1 zeroext %v1) nounwind ssp {
+entry:
+  %conv = zext i1 %v1 to i32
+  %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+  ret void
+}
+
+; CHECK: @bar2
+; CHECK-NOT: movzbl
+; CHECK: callq
+define void @bar2(i8 zeroext %v1) nounwind ssp {
+entry:
+  %conv = zext i8 %v1 to i32
+  %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+  ret void
+}
+
+declare i32 @foo(...)