From: 黄涛 <huangtao@rock-chips.com>
Date: Wed, 23 Jan 2013 15:09:20 +0000 (+0800)
Subject: rk3188: fix cpu aix init
X-Git-Tag: firefly_0821_release~7830
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=019f162a100e7a98f0b92655c895df0ddbfde0ff;p=firefly-linux-kernel-4.4.55.git

rk3188: fix cpu aix init
---

diff --git a/arch/arm/mach-rk30/common.c b/arch/arm/mach-rk30/common.c
index 2822b581af15..8c381862348a 100755
--- a/arch/arm/mach-rk30/common.c
+++ b/arch/arm/mach-rk30/common.c
@@ -22,11 +22,17 @@
 
 static void __init rk30_cpu_axi_init(void)
 {
-#ifndef CONFIG_ARCH_RK3188
+#ifdef CONFIG_ARCH_RK3188
+	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x1008);	// dmac1
+	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x2008);	// cpu0
+	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x2088);	// cpu1r
+	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x2108);	// cpu1w
+#else
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0088);	// cpu0
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0108);	// dmac1
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0188);	// cpu1r
 	writel_relaxed(0x0, RK30_CPU_AXI_BUS_BASE + 0x0388);	// cpu1w
+#endif
 #ifdef CONFIG_RK29_VMAC
 	writel_relaxed(0xa, RK30_CPU_AXI_BUS_BASE + 0x4008);	// peri
 #else
@@ -44,7 +50,6 @@ static void __init rk30_cpu_axi_init(void)
 #endif
 	writel_relaxed(0x3f, RK30_CPU_AXI_BUS_BASE + 0x0014);	// memory scheduler read latency
 	dsb();
-#endif
 }
 
 static void __init rk30_io_drive_strength_init(void)