LLVM 1.6 Release Notes

This document contains the release notes for the LLVM compiler -infrastructure, release 1.6. Here we describe the status of LLVM, including any +infrastructure, release 1.7. Here we describe the status of LLVM, including any known problems and major improvements from the previous release. The most up-to-date version of this document can be found on the LLVM 1.6 web site. If you are +href="http://llvm.org/releases/">LLVM releases web site. If you are not reading this on the LLVM web pages, you should probably go there because this document may be updated after the release.

@@ -71,181 +71,9 @@ out and it is now as well supported as Linux on X86.

-New Features in LLVM 1.6 +New Features in LLVM 1.7cvs

- -

Instruction Selector -Generation from Target Description

- -

LLVM now includes support for auto-generating large portions of the -instruction selectors from target descriptions. This allows us to -write patterns in the target .td file, instead of writing lots of -nasty C++ code. Most of the PowerPC instruction selector is now -generated from the PowerPC target description files and other targets -are adding support that will be live for LLVM 1.7.

- -

For example, here are some patterns used by the PowerPC backend. A -floating-point multiply then subtract instruction (FMSUBS):

- -

-(set F4RC:$FRT, (fsub (fmul F4RC:$FRA, F4RC:$FRC), F4RC:$FRB)) -

- -

Exclusive-or by 16-bit immediate (XORI):

- -

-(set GPRC:$dst, (xor GPRC:$src1, immZExt16:$src2)) -

- -

Exclusive-or by 16-bit immediate shifted right 16-bits (XORIS):

- -

-(set GPRC:$dst, (xor GPRC:$src1, imm16Shifted:$src2)) -

- -

With these definitions, we teach the code generator how to combine these two -instructions to xor an abitrary 32-bit immediate with the following -definition. The first line specifies what to match (a xor with an arbitrary -immediate) the second line specifies what to produce:

- -

def : Pat<(xor GPRC:$in, imm:$imm),
-          (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
-

- -

- - -

Instruction Scheduling -Support

- -

Instruction selectors using the refined instruction selection framework can now -use a simple pre-pass scheduler included with LLVM 1.6. This scheduler is -currently simple (cannot be configured much by the targets), but will be -extended in the future.

- - -

Code Generator Subtarget -Support

- -

It is now straight-forward to parameterize a target implementation, and -provide a mapping from CPU names to sets of target parameters. LLC now supports -a -mcpu=cpu option that lets you choose a subtarget by CPU name: use -"llvm-as < /dev/null | llc -march=XXX -mcpu=help" to get a list of -supported CPUs for target "XXX". It also provides a --mattr=+attr1,-attr2 option that can be used to control individual -features of a target (the previous command will list available features as -well).

- -

This functionality is nice when you want tell LLC something like "compile to -code that is specialized for the PowerPC G5, but doesn't use altivec code. In -this case, using "llc -march=ppc32 -mcpu=g5 -mattr=-altivec".

- -

- - -

Other New Features

- -

The JIT now uses mutexes to protect its internal data structures. This - allows multi-threaded programs to be run from the JIT or interpreter without - corruption of the internal data structures. See - PR418 and - PR540 for the details. -
LLVM on Win32 no longer requires sed, - flex, or bison when compiling with Visual C++.
The llvm-test suite can now use the NAG Fortran to C compiler to compile - SPEC FP programs if available (allowing us to test all of SPEC'95 & - 2000).
When bugpoint is grinding away and the user hits ctrl-C, it now - gracefully stops and gives what it has reduced so far, instead of - giving up completely. In addition, the JIT - debugging mode of bugpoint is much faster.
LLVM now includes Xcode project files in the llvm/Xcode directory.
LLVM now supports Mac OS X on Intel.
LLVM now builds cleanly with GCC 4.1.

- - -

-Code Quality Improvements in LLVM 1.6 -

- -

The -globalopt pass can now statically evaluate C++ static - constructors when they are simple enough. For example, it can - now statically initialize "struct X { int a; X() : a(4) {} } g;". -
The Loop Strength Reduction pass has been completely rewritten, is far - more aggressive, and is turned on by default in the RISC targets. On PPC, - we find that it often speeds up programs from 10-40% depending on the - program.
The code produced when exception handling is enabled is far more - efficient in some cases, particularly on Mac OS X.

- - - -

-Code Generator Improvements in LLVM 1.6 -

- -

The Alpha backend is substantially more stable and robust than in LLVM 1.5. - For example, it now fully supports varargs functions. The Alpha backend - also now features beta JIT support.
The code generator contains a new component, the DAG Combiner. This allows - us to optimize lowered code (e.g. after 64-bit operations have been lowered - to use 32-bit registers on 32-bit targets) and do fine-grained bit-twiddling - optimizations for the backend.
The SelectionDAG infrastructure is far more capable and mature, able to - handle many new target peculiarities in a target-independent way.
The default register allocator is now far - faster on some testcases, - particularly on targets with a large number of registers (e.g. IA64 - and PPC).

- - -

-Significant Bugs Fixed in LLVM 1.6 -

- -

A vast number of bugs have been fixed in the PowerPC backend and in - llvm-gcc when configured for Mac OS X (particularly relating to ABI - issues). For example: - PR449, - PR594, - PR603, - PR609, - PR630, - PR643, - and several others without bugzilla bugs.
Several bugs in tail call support have been fixed.
configure does not correctly detect gcc - version on cygwin.
Many many other random bugs have been fixed. Query our bugzilla with a target of 1.6 for more - information.