From: Jim Grosbach Date: Mon, 1 Nov 2010 16:59:54 +0000 (+0000) Subject: Mark ARM subtarget features that are available for the assembler. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;ds=inline;h=833c93c7958dbbd9d648f331091fbfbeabf342e6;p=oota-llvm.git Mark ARM subtarget features that are available for the assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 776dbbd8470..a49975ccfa5 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -142,27 +142,29 @@ def ARMbfi : SDNode<"ARMISD::BFI", SDT_ARMBFI>; //===----------------------------------------------------------------------===// // ARM Instruction Predicate Definitions. // -def HasV4T : Predicate<"Subtarget->hasV4TOps()">; +def HasV4T : Predicate<"Subtarget->hasV4TOps()">, AssemblerPredicate; def NoV4T : Predicate<"!Subtarget->hasV4TOps()">; def HasV5T : Predicate<"Subtarget->hasV5TOps()">; -def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">; -def HasV6 : Predicate<"Subtarget->hasV6Ops()">; -def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">; +def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">, AssemblerPredicate; +def HasV6 : Predicate<"Subtarget->hasV6Ops()">, AssemblerPredicate; +def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">, AssemblerPredicate; def NoV6T2 : Predicate<"!Subtarget->hasV6T2Ops()">; -def HasV7 : Predicate<"Subtarget->hasV7Ops()">; +def HasV7 : Predicate<"Subtarget->hasV7Ops()">, AssemblerPredicate; def NoVFP : Predicate<"!Subtarget->hasVFP2()">; -def HasVFP2 : Predicate<"Subtarget->hasVFP2()">; -def HasVFP3 : Predicate<"Subtarget->hasVFP3()">; -def HasNEON : Predicate<"Subtarget->hasNEON()">; -def HasDivide : Predicate<"Subtarget->hasDivide()">; -def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">; -def HasDB : Predicate<"Subtarget->hasDataBarrier()">; +def HasVFP2 : Predicate<"Subtarget->hasVFP2()">, AssemblerPredicate; +def HasVFP3 : Predicate<"Subtarget->hasVFP3()">, AssemblerPredicate; +def HasNEON : Predicate<"Subtarget->hasNEON()">, AssemblerPredicate; +def HasDivide : Predicate<"Subtarget->hasDivide()">, AssemblerPredicate; +def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">, + AssemblerPredicate; +def HasDB : Predicate<"Subtarget->hasDataBarrier()">, + AssemblerPredicate; def UseNEONForFP : Predicate<"Subtarget->useNEONForSinglePrecisionFP()">; def DontUseNEONForFP : Predicate<"!Subtarget->useNEONForSinglePrecisionFP()">; -def IsThumb : Predicate<"Subtarget->isThumb()">; +def IsThumb : Predicate<"Subtarget->isThumb()">, AssemblerPredicate; def IsThumb1Only : Predicate<"Subtarget->isThumb1Only()">; -def IsThumb2 : Predicate<"Subtarget->isThumb2()">; -def IsARM : Predicate<"!Subtarget->isThumb()">; +def IsThumb2 : Predicate<"Subtarget->isThumb2()">, AssemblerPredicate; +def IsARM : Predicate<"!Subtarget->isThumb()">, AssemblerPredicate; def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">; def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">; diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index fe46a041746..0f1b2e20764 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -92,7 +92,11 @@ private: public: ARMAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &_TM) - : TargetAsmParser(T), Parser(_Parser), TM(_TM) {} + : TargetAsmParser(T), Parser(_Parser), TM(_TM) { + // Initialize the set of available features. + setAvailableFeatures(ComputeAvailableFeatures( + &TM.getSubtarget())); + } virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl &Operands); diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index 18a8cfa90e2..b82b36a0439 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -triple arm-unknown-unknown -show-encoding %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s @ CHECK: nop @ CHECK: encoding: [0x00,0xf0,0x20,0xe3] diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s index 78336913169..e782479b608 100644 --- a/test/MC/ARM/arm_word_directive.s +++ b/test/MC/ARM/arm_word_directive.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s @ CHECK: TEST0: @ CHECK: .long 3 diff --git a/test/MC/ARM/neon-abs-encoding.s b/test/MC/ARM/neon-abs-encoding.s index b895a75977b..9a6284d0ee7 100644 --- a/test/MC/ARM/neon-abs-encoding.s +++ b/test/MC/ARM/neon-abs-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3] vabs.s8 d16, d16 diff --git a/test/MC/ARM/neon-absdiff-encoding.s b/test/MC/ARM/neon-absdiff-encoding.s index 314fc63b2d1..005a7f5c9b2 100644 --- a/test/MC/ARM/neon-absdiff-encoding.s +++ b/test/MC/ARM/neon-absdiff-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // NOTE: This currently fails because the ASM parser doesn't parse vabal. diff --git a/test/MC/ARM/neon-add-encoding.s b/test/MC/ARM/neon-add-encoding.s index 6211a3ef021..632657a6c5a 100644 --- a/test/MC/ARM/neon-add-encoding.s +++ b/test/MC/ARM/neon-add-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s // CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf2] diff --git a/test/MC/ARM/neon-bitcount-encoding.s b/test/MC/ARM/neon-bitcount-encoding.s index 1693711f8ea..85ebcc0845a 100644 --- a/test/MC/ARM/neon-bitcount-encoding.s +++ b/test/MC/ARM/neon-bitcount-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3] diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s index da7ae64fab2..9db5cdabdcd 100644 --- a/test/MC/ARM/neon-bitwise-encoding.s +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf2] vand d16, d17, d16 diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s index 1838587522a..bb4ef94181f 100644 --- a/test/MC/ARM/neon-cmp-encoding.s +++ b/test/MC/ARM/neon-cmp-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // FIXME: We cannot currently test the following instructions, which are diff --git a/test/MC/ARM/neon-convert-encoding.s b/test/MC/ARM/neon-convert-encoding.s index c60024a2d3d..a0d6688b6a6 100644 --- a/test/MC/ARM/neon-convert-encoding.s +++ b/test/MC/ARM/neon-convert-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3] vcvt.s32.f32 d16, d16 diff --git a/test/MC/ARM/neon-dup-encoding.s b/test/MC/ARM/neon-dup-encoding.s index 05380cab12f..557df2c978b 100644 --- a/test/MC/ARM/neon-dup-encoding.s +++ b/test/MC/ARM/neon-dup-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s index f7200f08407..cd8d5af202f 100644 --- a/test/MC/ARM/neon-minmax-encoding.s +++ b/test/MC/ARM/neon-minmax-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2] vmin.s8 d16, d16, d17 diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s index 2aaad9e121c..5cd6d8f3911 100644 --- a/test/MC/ARM/neon-mov-encoding.s +++ b/test/MC/ARM/neon-mov-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2] diff --git a/test/MC/ARM/neon-mul-accum-encoding.s b/test/MC/ARM/neon-mul-accum-encoding.s index e76ad245843..2b11c51039f 100644 --- a/test/MC/ARM/neon-mul-accum-encoding.s +++ b/test/MC/ARM/neon-mul-accum-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf2] diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s index 80c19ba185c..8afc8dbf342 100644 --- a/test/MC/ARM/neon-mul-encoding.s +++ b/test/MC/ARM/neon-mul-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2] vmul.i8 d16, d16, d17 diff --git a/test/MC/ARM/neon-neg-encoding.s b/test/MC/ARM/neon-neg-encoding.s index b81f49bcf92..38c49ca6790 100644 --- a/test/MC/ARM/neon-neg-encoding.s +++ b/test/MC/ARM/neon-neg-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xf3] vneg.s8 d16, d16 diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s index b00e6062dab..683dd96f7c5 100644 --- a/test/MC/ARM/neon-pairwise-encoding.s +++ b/test/MC/ARM/neon-pairwise-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // XFAIL: * // CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2] diff --git a/test/MC/ARM/neon-reciprocal-encoding.s b/test/MC/ARM/neon-reciprocal-encoding.s index 762d107980f..0e251973ffc 100644 --- a/test/MC/ARM/neon-reciprocal-encoding.s +++ b/test/MC/ARM/neon-reciprocal-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3] vrecpe.u32 d16, d16 diff --git a/test/MC/ARM/neon-reverse-encoding.s b/test/MC/ARM/neon-reverse-encoding.s index a4c713d562e..1b538b88637 100644 --- a/test/MC/ARM/neon-reverse-encoding.s +++ b/test/MC/ARM/neon-reverse-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3] vrev64.8 d16, d16 diff --git a/test/MC/ARM/neon-satshift-encoding.s b/test/MC/ARM/neon-satshift-encoding.s index 81fe70a998b..64ec3e6fd45 100644 --- a/test/MC/ARM/neon-satshift-encoding.s +++ b/test/MC/ARM/neon-satshift-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf2] vqshl.s8 d16, d16, d17 diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s index f03af418761..b3fd1353ded 100644 --- a/test/MC/ARM/neon-shift-encoding.s +++ b/test/MC/ARM/neon-shift-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s // CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3] vshl.u8 d16, d17, d16 diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s index 61dd9b32df2..0df7ccdbec2 100644 --- a/test/MC/ARM/simple-fp-encoding.s +++ b/test/MC/ARM/simple-fp-encoding.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s // CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee] vadd.f64 d16, d17, d16