Move AArch64TargetLowering to AArch64Subtarget.
authorEric Christopher <echristo@gmail.com>
Tue, 10 Jun 2014 23:26:45 +0000 (23:26 +0000)
committerEric Christopher <echristo@gmail.com>
Tue, 10 Jun 2014 23:26:45 +0000 (23:26 +0000)
This currently necessitates a TargetMachine for the TargetLowering
constructor and TLOF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210605 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/AArch64ISelLowering.h
lib/Target/AArch64/AArch64Subtarget.cpp
lib/Target/AArch64/AArch64Subtarget.h
lib/Target/AArch64/AArch64TargetMachine.cpp
lib/Target/AArch64/AArch64TargetMachine.h

index e2ed20d8615b97956bc70f4f5dc30968ce63e488..79312adbd2c81bd50f3985434654727b6e468455 100644 (file)
@@ -74,7 +74,7 @@ static TargetLoweringObjectFile *createTLOF(const Triple &TT) {
   return new AArch64_ELFTargetObjectFile();
 }
 
-AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
+AArch64TargetLowering::AArch64TargetLowering(TargetMachine &TM)
     : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
   Subtarget = &TM.getSubtarget<AArch64Subtarget>();
 
index de16c4d9d4b8d25726467c58eed37d333facaeb1..139217d34402a965607fcfb4a36dcd042eb20ad5 100644 (file)
@@ -197,7 +197,7 @@ class AArch64TargetLowering : public TargetLowering {
   bool RequireStrictAlign;
 
 public:
-  explicit AArch64TargetLowering(AArch64TargetMachine &TM);
+  explicit AArch64TargetLowering(TargetMachine &TM);
 
   /// Selects the correct CCAssignFn for a the given CallingConvention
   /// value.
index f01a70b65c1eec6c413ff1eff07f4c2b897d1048..a1e8b87ed9c57c738c89624a0963432a3a2b37fc 100644 (file)
@@ -32,7 +32,8 @@ EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
 
 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
                                    const std::string &CPU,
-                                   const std::string &FS, bool LittleEndian)
+                                   const std::string &FS, TargetMachine &TM,
+                                   bool LittleEndian)
     : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
       HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
       HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
@@ -51,6 +52,7 @@ AArch64Subtarget::AArch64Subtarget(const std::string &TT,
     CPUString = "generic";
 
   ParseSubtargetFeatures(CPUString, FS);
+  TLInfo = make_unique<AArch64TargetLowering>(TM);
 }
 
 /// ClassifyGlobalReference - Find the target operand flags that describe
index d8930706cfe89031d6b37e36f600f18579e9c581..3eef2488067bddbb96897247be7096e0d45fb967 100644 (file)
@@ -16,6 +16,7 @@
 
 #include "AArch64InstrInfo.h"
 #include "AArch64FrameLowering.h"
+#include "AArch64ISelLowering.h"
 #include "AArch64RegisterInfo.h"
 #include "AArch64SelectionDAGInfo.h"
 #include "llvm/IR/DataLayout.h"
@@ -57,17 +58,21 @@ protected:
   AArch64FrameLowering FrameLowering;
   AArch64InstrInfo InstrInfo;
   AArch64SelectionDAGInfo TSInfo;
+  std::unique_ptr<AArch64TargetLowering> TLInfo;
 
 public:
   /// This constructor initializes the data members to match that
   /// of the specified triple.
   AArch64Subtarget(const std::string &TT, const std::string &CPU,
-                 const std::string &FS, bool LittleEndian);
+                  const std::string &FS, TargetMachine &TM, bool LittleEndian);
 
   const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
   const AArch64FrameLowering *getFrameLowering() const {
     return &FrameLowering;
   }
+  const AArch64TargetLowering *getTargetLowering() const {
+    return TLInfo.get();
+  }
   const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
   const DataLayout *getDataLayout() const { return &DL; }
   bool enableMachineScheduler() const override { return true; }
index 7a8d0e79d4406f78d5786264f941b1ce3c9636df..f99b90b800f4b505e99270f6793c9506c410e470 100644 (file)
@@ -77,7 +77,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
                                            CodeGenOpt::Level OL,
                                            bool LittleEndian)
     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
-      Subtarget(TT, CPU, FS, LittleEndian), TLInfo(*this) {
+      Subtarget(TT, CPU, FS, *this, LittleEndian) {
   initAsmInfo();
 }
 
index 937c17ffd1169b6107b7438b2a5cd4a672531d62..6a159e91e22fa7571001495a918b16f67c22e14c 100644 (file)
@@ -29,9 +29,6 @@ class AArch64TargetMachine : public LLVMTargetMachine {
 protected:
   AArch64Subtarget Subtarget;
 
-private:
-  AArch64TargetLowering TLInfo;
-
 public:
   AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
                        StringRef FS, const TargetOptions &Options,
@@ -42,7 +39,7 @@ public:
     return &Subtarget;
   }
   const AArch64TargetLowering *getTargetLowering() const override {
-    return &TLInfo;
+    return getSubtargetImpl()->getTargetLowering();
   }
   const DataLayout *getDataLayout() const override {
     return getSubtargetImpl()->getDataLayout();