[mips][microMIPSr6] Implement disassembler support
authorJozef Kolek <jozef.kolek@imgtec.com>
Mon, 20 Apr 2015 14:40:38 +0000 (14:40 +0000)
committerJozef Kolek <jozef.kolek@imgtec.com>
Mon, 20 Apr 2015 14:40:38 +0000 (14:40 +0000)
Implement disassembler support for microMIPS32r6.

Differential Revision: http://reviews.llvm.org/D8490

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235307 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/Disassembler/MipsDisassembler.cpp
lib/Target/Mips/MicroMips32r6InstrInfo.td
test/MC/Disassembler/Mips/micromips32r6.txt [new file with mode: 0644]

index 8849366e8371e306894d85479df9ca133a78e12b..f9d00291419ab26c8814099167efc4205f78c44d 100644 (file)
@@ -837,10 +837,17 @@ DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
     if (Result == MCDisassembler::Fail)
       return MCDisassembler::Fail;
 
-    DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
-    // Calling the auto-generated decoder function.
-    Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
-                               this, STI);
+    if (hasMips32r6()) {
+      DEBUG(dbgs() << "Trying MicroMips32r632 table (32-bit instructions):\n");
+      // Calling the auto-generated decoder function.
+      Result = decodeInstruction(DecoderTableMicroMips32r632, Instr, Insn, Address,
+                                 this, STI);
+    } else {
+      DEBUG(dbgs() << "Trying MicroMips32 table (32-bit instructions):\n");
+      // Calling the auto-generated decoder function.
+      Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
+                                 this, STI);
+    }
     if (Result != MCDisassembler::Fail) {
       Size = 4;
       return Result;
index ed97aae014fb012b4f9db680aa780c83653a8c95..e1c065447ce073b6d820ba73f994016ddcabe3da 100644 (file)
@@ -46,5 +46,7 @@ class BC_MMR6_DESC : BC_MMR6_DESC_BASE<"bc", brtarget26>;
 //
 //===----------------------------------------------------------------------===//
 
+let DecoderNamespace = "MicroMips32r6" in {
 def BALC_MMR6 : R6MMR6Rel, BALC_MMR6_ENC, BALC_MMR6_DESC, ISA_MICROMIPS32R6;
 def BC_MMR6 : R6MMR6Rel, BC_MMR6_ENC, BC_MMR6_DESC, ISA_MICROMIPS32R6;
+}
diff --git a/test/MC/Disassembler/Mips/micromips32r6.txt b/test/MC/Disassembler/Mips/micromips32r6.txt
new file mode 100644 (file)
index 0000000..0b1b78f
--- /dev/null
@@ -0,0 +1,7 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 -mattr=micromips | FileCheck %s
+
+# CHECK: balc 14572256
+0xb4 0x37 0x96 0xb8
+
+# CHECK: bc 14572256
+0x94 0x37 0x96 0xb8