Remove assert as the only integer registers on the sparc are physical.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11317 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
index b69408d2bacc01edbb1a21c95c36f704f52e5272..495f79171ebe50fa391f4fe936e4d7c2b68a08a8 100644 (file)
--- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -29,7 +29,6 @@
 #include "llvm/CodeGen/MachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetData.h"
 #include "Support/Debug.h"
@@ -659,8 +658,6 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
     }
   } else if (MO.isRegister() || MO.getType() == MachineOperand::MO_CCRegister)
   {
-    assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
-           "virtual register in machine code!"); 
     // This is necessary because the Sparc backend doesn't actually lay out
     // registers in the real fashion -- it skips those that it chooses not to
     // allocate, i.e. those that are the FP, SP, etc.