rk30:phone loquat:reduce arm and logic voltage when pmu enter sleep,set spi gpio...
author张晴 <zhangqing@rock-chips.com>
Mon, 28 May 2012 14:19:05 +0000 (22:19 +0800)
committer张晴 <zhangqing@rock-chips.com>
Mon, 28 May 2012 14:19:05 +0000 (22:19 +0800)
arch/arm/mach-rk30/board-rk30-phone-loquat.c
arch/arm/mach-rk30/board-rk30-phone-twl60xx.c
drivers/mfd/twl-core.c
include/linux/i2c/twl.h

index 319bacb04a92daca2d2dd353791d1882f41ec1c2..36a7af0d79305efb1d58ddbf9dc317bfa6a173f2 100755 (executable)
@@ -1910,7 +1910,41 @@ static int rk_virtual_keys_init(void)
 /*************************end of virtual_keys************************/
 #endif
 
+void board_gpio_suspend(void) {
+       gpio_request(RK30_PIN2_PC3, NULL);
+       rk30_mux_api_set(GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME,GPIO2C_GPIO2C3);
+       gpio_direction_input(RK30_PIN2_PC3);
+       gpio_pull_updown(RK30_PIN2_PC3, 0);
+       
+       gpio_request(RK30_PIN2_PC5, NULL);
+       rk30_mux_api_set(GPIO2C5_LCDC1DATA21_SPI1TXD_HSADCDATA2_NAME,GPIO2C_GPIO2C5);
+       gpio_direction_input(RK30_PIN2_PC5);
+       gpio_pull_updown(RK30_PIN2_PC5, 0);
+       
+       gpio_request(RK30_PIN2_PC6, NULL);
+       rk30_mux_api_set(GPIO2C6_LCDC1DATA22_SPI1RXD_HSADCDATA3_NAME,GPIO2C_GPIO2C6);
+       gpio_direction_input(RK30_PIN2_PC6);
+       gpio_pull_updown(RK30_PIN2_PC6, 0);
+       
+}
+ void board_gpio_resume(void) {
 
+       gpio_request(RK30_PIN2_PC3, NULL);
+       gpio_pull_updown(RK30_PIN2_PC3, 1);
+       rk30_mux_api_set(GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME,GPIO2C_SPI1_CLK);
+       
+       gpio_request(RK30_PIN2_PC5, NULL);
+       gpio_pull_updown(RK30_PIN2_PC5, 1);
+       rk30_mux_api_set(GPIO2C5_LCDC1DATA21_SPI1TXD_HSADCDATA2_NAME,GPIO2C_SPI1_TXD);
+       
+       gpio_request(RK30_PIN2_PC6, NULL);
+       gpio_pull_updown(RK30_PIN2_PC6, 1);
+       rk30_mux_api_set(GPIO2C6_LCDC1DATA22_SPI1RXD_HSADCDATA3_NAME,GPIO2C_SPI1_RXD);
+
+       gpio_free(RK30_PIN2_PC3);
+       gpio_free(RK30_PIN2_PC5);
+       gpio_free(RK30_PIN2_PC6);
+}
 
 static void __init machine_rk30_board_init(void)
 {
index b7464e65f1022aab7bc6572f29b020e3acfc109f..e085c6875be1877158f7cf717976aa9f626e8fea 100755 (executable)
 #define TWL60xx_IRQ_END                (TWL60xx_IRQ_BASE + TWL60xx_BASE_NR_IRQS)
 
 #ifdef CONFIG_TWL4030_CORE
-#define PREQ1_RES_ASS_A 0x2a
-#define PREQ1_RES_ASS_B 0x2b
-#define PREQ1_RES_ASS_C 0x2c
-#define PREQ2_RES_ASS_A 0x2d
-#define PREQ3_RES_ASS_A 0x30
-#define PHOENIX_MSK_TRANSITION 0x01
-#define PHOENIX_SENS_TRANSITION 0x0b
-#define SMPS4_CFG_TRANS 0x11
-#define SMPS4_CFG_STATE 0x12
-#define SMPS4_CFG_VOLTAGE 0x13
-#define SMPS5_CFG_TRANS 0x17
-#define SMPS5_CFG_STATE 0x18
-#define SMPS5_CFG_FORCE 0x19
-#define SMPS5_CFG_VOLTAGE 0x1A
-#define SMPS5_CFG_STEP 0x1B
-#define SMPS1_CFG_TRANS 0x23
-#define SMPS1_CFG_STATE 0x24
-#define SMPS1_CFG_FORCE 0x25
-#define SMPS1_CFG_VOLTAGE 0x26
-#define SMPS1_CFG_STEP 0x27
-#define SMPS2_CFG_TRANS 0x29
-#define SMPS2_CFG_STATE 0x2a
-#define SMPS2_CFG_FORCE 0x2b
-#define SMPS2_CFG_VOLTAGE 0x2c
-#define SMPS2_CFG_STEP 0x2d
-#define VANA_CFG_TRANS 0x51
-#define VANA_CFG_STATE 0x52
-#define VANA_CFG_VOLTAGE 0x53
-#define LDO2_CFG_TRANS 0x55
-#define LDO2_CFG_STATE 0x56
-#define LDO2_CFG_VOLTAGE 0x57
-#define LDO4_CFG_TRANS 0x59
-#define LDO4_CFG_STATE 0x5a
-#define LDO4_CFG_VOLTAGE 0x5b
-#define LDO3_CFG_TRANS 0x5d
-#define LDO3_CFG_STATE 0x5e
-#define LDO3_CFG_VOLTAGE 0x5f
-#define LDO6_CFG_TRANS 0x61
-#define LDO6_CFG_STATE 0x62
-#define LDO6_CFG_VOLTAGE 0x63
-#define LDOLN_CFG_TRANS 0x65
-#define LDOLN_CFG_STATE 0x66
-#define LDOLN_CFG_VOLTAGE 0x67
-#define LDO5_CFG_TRANS 0x69
-#define LDO5_CFG_STATE 0x6A
-#define LDO5_CFG_VOLTAGE 0x6B
-#define LDO1_CFG_TRANS 0x6D
-#define LDO1_CFG_STATE 0x6E
-#define LDO1_CFG_VOLTAGE 0x6F
-#define LDOUSB_CFG_TRANS 0x71
-#define LDOUSB_CFG_STATE 0x72
-#define LDOUSB_CFG_VOLTAGE 0x73
-#define LDO7_CFG_TRANS 0x75
-#define LDO7_CFG_STATE 0x76
-#define LDO7_CFG_VOLTAGE 0x77
-#define CLK32KG_CFG_STATE  0x11
-#define CLK32KAUDIO_CFG_STATE 0x14
-#define CHARGERUSB_CTRLLIMIT2  0x10
+
 static inline int twl_reg_read(unsigned base, unsigned slave_subgp)
 {
        u8 value;
index a53734536ac821ea25210fa0a781d1ce2b23e0e4..27191d930a88b4967c29ddb0c461eb6ce0f7f867 100755 (executable)
@@ -1330,12 +1330,26 @@ static void clocks_init(struct device *dev,
 #ifdef CONFIG_PM
 static int twl_suspend(struct i2c_client *client, pm_message_t mesg)
 {              
+       twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,0x1a,SMPS4_CFG_VOLTAGE);//dc4 vcc_io is 2.8v in sleep mode
+       twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,0x01,LDO4_CFG_VOLTAGE);//ld4 vdd_11 is 1v in sleep mode
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0x20,SMPS1_CFG_VOLTAGE);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0xe0,SMPS1_CFG_FORCE);//dc1 vdd_arm is 1v in sleep mode
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0x20,SMPS2_CFG_VOLTAGE);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0xe0,SMPS2_CFG_FORCE);//dc2 vdd_logic is 1v in sleep mode
        return irq_set_irq_wake(client->irq, 1);
 }
 
 static int twl_resume(struct i2c_client *client)
 {
-       return irq_set_irq_wake(client->irq, 0);
+       //      return irq_set_irq_wake(client->irq, 0);
+       irq_set_irq_wake(client->irq, 0);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0x28,SMPS1_CFG_VOLTAGE);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0xe8,SMPS1_CFG_FORCE);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0x28,SMPS2_CFG_VOLTAGE);
+       twl_i2c_write_u8(TWL_MODULE_PM_DVS,0xe8,SMPS2_CFG_FORCE);
+       twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,0x02,LDO4_CFG_VOLTAGE);  
+       twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,0x1f,SMPS4_CFG_VOLTAGE);
+       return 0;
 }
 #else
 #define twl_suspend    NULL
index 6c6bea841fa5b6557f182a6ba88c71443ce49975..2ff768ef5dc74aaa7188275bd315a0f8fa1f128c 100755 (executable)
  * address each module uses within a given i2c slave.
  */
 
+#define PREQ1_RES_ASS_A 0x2a
+#define PREQ1_RES_ASS_B 0x2b
+#define PREQ1_RES_ASS_C 0x2c
+#define PREQ2_RES_ASS_A 0x2d
+#define PREQ3_RES_ASS_A 0x30
+#define PHOENIX_MSK_TRANSITION 0x01
+#define PHOENIX_SENS_TRANSITION 0x0b
+#define SMPS4_CFG_TRANS 0x11
+#define SMPS4_CFG_STATE 0x12
+#define SMPS4_CFG_VOLTAGE 0x14
+#define SMPS5_CFG_TRANS 0x17
+#define SMPS5_CFG_STATE 0x18
+#define SMPS5_CFG_FORCE 0x19
+#define SMPS5_CFG_VOLTAGE 0x1A
+#define SMPS5_CFG_STEP 0x1B
+#define SMPS1_CFG_TRANS 0x23
+#define SMPS1_CFG_STATE 0x24
+#define SMPS1_CFG_FORCE 0x25
+#define SMPS1_CFG_VOLTAGE 0x26
+#define SMPS1_CFG_STEP 0x27
+#define SMPS2_CFG_TRANS 0x29
+#define SMPS2_CFG_STATE 0x2a
+#define SMPS2_CFG_FORCE 0x2b
+#define SMPS2_CFG_VOLTAGE 0x2c
+#define SMPS2_CFG_STEP 0x2d
+#define VANA_CFG_TRANS 0x51
+#define VANA_CFG_STATE 0x52
+#define VANA_CFG_VOLTAGE 0x53
+#define LDO2_CFG_TRANS 0x55
+#define LDO2_CFG_STATE 0x56
+#define LDO2_CFG_VOLTAGE 0x57
+#define LDO4_CFG_TRANS 0x59
+#define LDO4_CFG_STATE 0x5a
+#define LDO4_CFG_VOLTAGE 0x5b
+#define LDO3_CFG_TRANS 0x5d
+#define LDO3_CFG_STATE 0x5e
+#define LDO3_CFG_VOLTAGE 0x5f
+#define LDO6_CFG_TRANS 0x61
+#define LDO6_CFG_STATE 0x62
+#define LDO6_CFG_VOLTAGE 0x63
+#define LDOLN_CFG_TRANS 0x65
+#define LDOLN_CFG_STATE 0x66
+#define LDOLN_CFG_VOLTAGE 0x67
+#define LDO5_CFG_TRANS 0x69
+#define LDO5_CFG_STATE 0x6A
+#define LDO5_CFG_VOLTAGE 0x6B
+#define LDO1_CFG_TRANS 0x6D
+#define LDO1_CFG_STATE 0x6E
+#define LDO1_CFG_VOLTAGE 0x6F
+#define LDOUSB_CFG_TRANS 0x71
+#define LDOUSB_CFG_STATE 0x72
+#define LDOUSB_CFG_VOLTAGE 0x73
+#define LDO7_CFG_TRANS 0x75
+#define LDO7_CFG_STATE 0x76
+#define LDO7_CFG_VOLTAGE 0x77
+#define CLK32KG_CFG_STATE  0x11
+#define CLK32KAUDIO_CFG_STATE 0x14
+#define CHARGERUSB_CTRLLIMIT2  0x10
+
+
 /* Slave 0 (i2c address 0x48) */
 #define TWL4030_MODULE_USB             0x00