Add AssertSext, AssertZext nodes for targets that pass arguments in

registers, and the incoming values have already been zero or sign extended
from the appopriate type to the register width.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23146 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index ba53a18b70c03f38ffd666f671f93196b756ba33..8d5cf1065623b0ac811658930c9d0dfb241a51b6 100644 (file)
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -52,6 +52,13 @@ namespace ISD {
     // single token result.  This is used to represent the fact that the operand
     // operators are independent of each other.
     TokenFactor,
+    
+    // AssertSext, AssertZext - These nodes record if a register contains a 
+    // value that has already been zero or sign extended from a narrower type.  
+    // These nodes take two operands.  The first is the node that has already 
+    // been extended, and the second is a value type node indicating the width
+    // of the extension
+    AssertSext, AssertZext,
 
     // Various leaf nodes.
     Constant, ConstantFP, GlobalAddress, FrameIndex, ConstantPool,