Generate a code emitter for PowerPC as well, this will be used in the JIT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15578 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile
index 3dfcda889d8a14b6022c7fe220abeda66adc07c8..5bc1fcec0c4462c703838346f0faa24bce766537 100644 (file)
--- a/lib/Target/PowerPC/Makefile
+++ b/lib/Target/PowerPC/Makefile
@@ -15,7 +15,7 @@ TARGET = PowerPC
 # Make sure that tblgen is run, first thing.
 $(SourceDepend): PowerPCGenRegisterInfo.h.inc PowerPCGenRegisterNames.inc \
                  PowerPCGenRegisterInfo.inc PowerPCGenInstrNames.inc \
-                 PowerPCGenInstrInfo.inc
+                 PowerPCGenInstrInfo.inc PowerPCGenCodeEmitter.inc
 
 TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
           $(SourceDir)/../Target.td
@@ -40,5 +40,9 @@ $(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
        @echo "Building $(TARGET).td instruction information with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
 
+$(TARGET)GenCodeEmitter.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td code emitter"
+       $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@
+
 clean::
        $(VERB) rm -f *.inc