R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
authorTom Stellard <thomas.stellard@amd.com>
Wed, 3 Dec 2014 18:27:08 +0000 (18:27 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Wed, 3 Dec 2014 18:27:08 +0000 (18:27 +0000)
This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223253 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/AMDGPUTargetMachine.cpp

index 8854e7b5093a1be63ffb20c1605eec8989ffe2da..08db0011e0912ec3f692e60a73b88773dd6d0410 100644 (file)
@@ -190,7 +190,6 @@ bool AMDGPUPassConfig::addPostRegAlloc() {
 
   if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
     addPass(createSIShrinkInstructionsPass());
-    addPass(createSIInsertWaits(*TM));
   }
   return false;
 }
@@ -204,6 +203,9 @@ bool AMDGPUPassConfig::addPreSched2() {
     addPass(&IfConverterID);
   if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS)
     addPass(createR600ClauseMergePass(*TM));
+  if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
+    addPass(createSIInsertWaits(*TM));
+  }
   return false;
 }