ARM: dts: OMAP2+: Simplify NAND support
authorJon Hunter <jon-hunter@ti.com>
Tue, 30 Apr 2013 14:11:22 +0000 (09:11 -0500)
committerTony Lindgren <tony@atomide.com>
Thu, 16 May 2013 16:21:19 +0000 (09:21 -0700)
Commit 8c8a777 (ARM: OMAP2+: Add function to read GPMC settings from
device-tree) added a device-tree property "gpmc,device-nand" to indicate
is the GPMC child device is NAND. This commit should have updated the
GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt)
to list the property "gpmc,device-nand" as a required property and also
updated the example. However, this property is redundant and not needed
because the GPMC child device node for NAND is called "nand". Therefore,
remove this property.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Documentation/devicetree/bindings/bus/ti-gpmc.txt
arch/arm/boot/dts/omap3430-sdp.dts
arch/arm/mach-omap2/gpmc-nand.c
arch/arm/mach-omap2/gpmc.c

index 4b87ea1194e3128e6adba331931cc3616f8e10df..704be9306c9fb5e0da668d002b5390af92cf94c1 100644 (file)
@@ -95,7 +95,6 @@ GPMC chip-select settings properties for child nodes. All are optional.
 - gpmc,burst-wrap      Enables wrap bursting
 - gpmc,burst-read      Enables read page/burst mode
 - gpmc,burst-write     Enables write page/burst mode
-- gpmc,device-nand     Device is NAND
 - gpmc,device-width    Total width of device(s) connected to a GPMC
                        chip-select in bytes. The GPMC supports 8-bit
                        and 16-bit devices and so this property must be
index 144ae43453c4218c06052a393dc9e25f6143f7d7..6076d016b47961de5d22882ddd96cd0f3995d9ea 100644 (file)
                nand-bus-width = <8>;
 
                ti,nand-ecc-opt = "sw";
-               gpmc,device-nand;
                gpmc,cs-on-ns = <0>;
                gpmc,cs-rd-off-ns = <36>;
                gpmc,cs-wr-off-ns = <36>;
index c8044b08dada32e575d8326288af60c63c19fc58..662c7fd633ccf3b28847c3d9663d308c5be14961 100644 (file)
@@ -102,8 +102,6 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
                if (gpmc_nand_data->of_node) {
                        gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
                } else {
-                       s.device_nand = true;
-
                        /* Enable RD PIN Monitoring Reg */
                        if (gpmc_nand_data->dev_ready) {
                                s.wait_on_read = true;
@@ -111,6 +109,8 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
                        }
                }
 
+               s.device_nand = true;
+
                if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
                        s.device_width = GPMC_DEVWIDTH_16BIT;
                else
index a195468286f4bd265c856f888f64315dbd40eca3..70d11ceec0d7bf6bdb5f71b7626b94a5bad49db3 100644 (file)
@@ -1245,7 +1245,6 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p)
 
        p->sync_read = of_property_read_bool(np, "gpmc,sync-read");
        p->sync_write = of_property_read_bool(np, "gpmc,sync-write");
-       p->device_nand = of_property_read_bool(np, "gpmc,device-nand");
        of_property_read_u32(np, "gpmc,device-width", &p->device_width);
        of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data);