rockchip,prop = <PRMRY>;
reg = <0x1010e000 0x2000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates6 0>, <&dclk_lcdc0>, <&clk_gates6 1>, <&sclk_lcdc0>;
- clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "sclk_lcdc";
+ clocks = <&clk_gates6 0>, <&dclk_lcdc0>, <&clk_gates6 1>, <&sclk_lcdc0>, <&pd_vio>;
+ clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "sclk_lcdc", "pd_lcdc";
rockchip,iommu-enabled = <1>;
status = "disabled";
};
clk_prepare_enable(lcdc_dev->hclk);
clk_prepare_enable(lcdc_dev->dclk);
clk_prepare_enable(lcdc_dev->aclk);
-// clk_prepare_enable(lcdc_dev->pd);
+ clk_prepare_enable(lcdc_dev->pd);
spin_lock(&lcdc_dev->reg_lock);
lcdc_dev->clk_on = 1;
spin_unlock(&lcdc_dev->reg_lock);
clk_disable_unprepare(lcdc_dev->dclk);
clk_disable_unprepare(lcdc_dev->hclk);
clk_disable_unprepare(lcdc_dev->aclk);
-// clk_disable_unprepare(lcdc_dev->pd);
+ clk_disable_unprepare(lcdc_dev->pd);
}
return 0;
lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
lcdc_dev->sclk = devm_clk_get(lcdc_dev->dev, "sclk_lcdc");
-// lcdc_dev->pd = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
+ lcdc_dev->pd = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
if ( /*IS_ERR(lcdc_dev->pd) || */ (IS_ERR(lcdc_dev->aclk)) ||
(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {