Fix PR1014 and InstCombine/2006-11-27-XorBug.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31941 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index a13b7e76ac27dee99284c5217a1130b8896f76fa..223624049eedebfb3e98dc0bae475bce5053bda4 100644 (file)
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -939,17 +939,15 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask,
     // Output known-1 are known to be set if set in only one of the LHS, RHS.
     uint64_t KnownOneOut = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
     
-    // If all of the unknown bits are known to be zero on one side or the other
-    // (but not both) turn this into an *inclusive* or.
+    // If all of the demanded bits are known to be zero on one side or the
+    // other, turn this into an *inclusive* or.
     //    e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
-    if (uint64_t UnknownBits = DemandedMask & ~(KnownZeroOut|KnownOneOut)) {
-      if ((UnknownBits & (KnownZero|KnownZero2)) == UnknownBits) {
-        Instruction *Or =
-          BinaryOperator::createOr(I->getOperand(0), I->getOperand(1),
-                                   I->getName());
-        InsertNewInstBefore(Or, *I);
-        return UpdateValueUsesWith(I, Or);
-      }
+    if ((DemandedMask & ~KnownZero & ~KnownZero2) == 0) {
+      Instruction *Or =
+        BinaryOperator::createOr(I->getOperand(0), I->getOperand(1),
+                                 I->getName());
+      InsertNewInstBefore(Or, *I);
+      return UpdateValueUsesWith(I, Or);
     }
     
     // If all of the demanded bits on one side are known, and all of the set