[POWERPC] DTS cleanup
authorKumar Gala <galak@kernel.crashing.org>
Wed, 12 Sep 2007 16:52:31 +0000 (11:52 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 14 Sep 2007 13:53:16 +0000 (08:53 -0500)
Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
25 files changed:
arch/powerpc/boot/dts/holly.dts
arch/powerpc/boot/dts/kuroboxHD.dts
arch/powerpc/boot/dts/kuroboxHG.dts
arch/powerpc/boot/dts/lite5200.dts
arch/powerpc/boot/dts/lite5200b.dts
arch/powerpc/boot/dts/mpc7448hpc2.dts
arch/powerpc/boot/dts/mpc8272ads.dts
arch/powerpc/boot/dts/mpc8313erdb.dts
arch/powerpc/boot/dts/mpc832x_mds.dts
arch/powerpc/boot/dts/mpc832x_rdb.dts
arch/powerpc/boot/dts/mpc8349emitx.dts
arch/powerpc/boot/dts/mpc8349emitxgp.dts
arch/powerpc/boot/dts/mpc834x_mds.dts
arch/powerpc/boot/dts/mpc836x_mds.dts
arch/powerpc/boot/dts/mpc8540ads.dts
arch/powerpc/boot/dts/mpc8541cds.dts
arch/powerpc/boot/dts/mpc8544ds.dts
arch/powerpc/boot/dts/mpc8548cds.dts
arch/powerpc/boot/dts/mpc8555cds.dts
arch/powerpc/boot/dts/mpc8560ads.dts
arch/powerpc/boot/dts/mpc8568mds.dts
arch/powerpc/boot/dts/mpc8641_hpcn.dts
arch/powerpc/boot/dts/mpc866ads.dts
arch/powerpc/boot/dts/mpc885ads.dts
arch/powerpc/boot/dts/prpmc2800.dts

index 1a4d0beccc996269229f01cf0de0b890d8c4fb4b..b5d87895fe060977fe8f9ff6e05c4ee726bcb9ed 100644 (file)
@@ -31,7 +31,6 @@
                        timebase-frequency = <2faf080>;
                        clock-frequency = <23c34600>;
                        bus-frequency = <bebc200>;
-                       32-bit;
                };
        };
 
index a7b3714bc0290516367c01e590b892d3dcfe794c..ec71ab819fee8a21522a35fe24a96bfbb481626b 100644 (file)
@@ -47,7 +47,6 @@ XXXX add flash parts, rtc, ??
        soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                compatible = "mpc10x";
                store-gathering = <0>; /* 0 == off, !0 == on */
@@ -101,7 +100,6 @@ XXXX add flash parts, rtc, ??
                        compatible = "chrp,open-pic";
                        interrupt-controller;
                        reg = <80040000 40000>;
-                       built-in;
                };
 
                pci@fec00000 {
index a0007b9bcc80f31e668c26b8dea989ea9ada422c..32ecd23199285bed81435759dfc86e54b60386e1 100644 (file)
@@ -47,7 +47,6 @@ XXXX add flash parts, rtc, ??
        soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                compatible = "mpc10x";
                store-gathering = <0>; /* 0 == off, !0 == on */
@@ -101,7 +100,6 @@ XXXX add flash parts, rtc, ??
                        compatible = "chrp,open-pic";
                        interrupt-controller;
                        reg = <80040000 40000>;
-                       built-in;
                };
 
                pci@fec00000 {
index d29308fe4c24d35e4fefd9ecff0e45c1a965b904..d8bcbb870fdc9316cb9c9e56d0259fa7b258264c 100644 (file)
@@ -37,7 +37,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
                model = "fsl,mpc5200";
                compatible = "mpc5200";
                revision = "";                  // from bootloader
-               #interrupt-cells = <3>;
                device_type = "soc";
-               ranges = <0 f0000000 f0010000>;
-               reg = <f0000000 00010000>;
+               ranges = <0 f0000000 0000c000>;
+               reg = <f0000000 00000100>;
                bus-frequency = <0>;            // from bootloader
                system-frequency = <0>;         // from bootloader
 
@@ -69,7 +67,6 @@
                        device_type = "interrupt-controller";
                        compatible = "mpc5200-pic";
                        reg = <500 80>;
-                       built-in;
                };
 
                gpt@600 {       // General Purpose Timer
index f242531f04514a56668e0f3ea525e086e442fb5b..5fe8998abb7c83c51bed7f91e764064cd95ab77f 100644 (file)
@@ -37,7 +37,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
                model = "fsl,mpc5200b";
                compatible = "mpc5200";
                revision = "";                  // from bootloader
-               #interrupt-cells = <3>;
                device_type = "soc";
-               ranges = <0 f0000000 f0010000>;
-               reg = <f0000000 00010000>;
+               ranges = <0 f0000000 0000c000>;
+               reg = <f0000000 00000100>;
                bus-frequency = <0>;            // from bootloader
                system-frequency = <0>;         // from bootloader
 
@@ -69,7 +67,6 @@
                        device_type = "interrupt-controller";
                        compatible = "mpc5200b-pic\0mpc5200-pic";
                        reg = <500 80>;
-                       built-in;
                };
 
                gpt@600 {       // General Purpose Timer
index b9158eb2797ea4e3e42b07b042a2e916227c5320..88cd37da13effa22c996b34613a37ee5acd3c841 100644 (file)
@@ -31,7 +31,6 @@
                        timebase-frequency = <0>;       // 33 MHz, from uboot
                        clock-frequency = <0>;          // From U-Boot
                        bus-frequency = <0>;            // From U-Boot
-                       32-bit;
                };
        };
 
@@ -44,7 +43,6 @@
        tsi108@c0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "tsi-bridge";
                ranges = <00000000 c0000000 00010000>;
                reg = <c0000000 00010000>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <7400 400>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                                big-endian;
                                device_type = "pic-router";
                                #address-cells = <0>;
                                #interrupt-cells = <2>;
-                               built-in;
                                big-endian;
                                interrupts = <17 2>;
                                interrupt-parent = <&mpic>;
index 4d09dcad2537f532c9cbeceb198bea971664508f..43130541799adfcb84b601c1cd1c056dd262d532 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -38,7 +37,6 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                reg = <f8200000 f8200004>;
-               built-in;
                device_type = "pci-pic";
        };
 
@@ -56,7 +54,6 @@
        soc8272@f0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <00000000 f0000000 00053000>;
                reg = <f0000000 10000>;
                cpm@f0000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       #interrupt-cells = <2>;
                        device_type = "cpm";
                        model = "CPM2";
                        ranges = <00000000 00000000 20000>;
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        reg = <10c00 80>;
-                       built-in;
                        device_type = "cpm-pic";
                        compatible = "CPM2";
                };
index c5adbe40364efd8e0b40e78004b60eae8261827d..abd73a2c5e0ceff09a85aa7fe6d7a9addd7503bf 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
@@ -41,7 +40,6 @@
        soc8313@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
        };
index f158ed781ba8250db6540dcc3209c51d7a06f2e7..e88167dc18594577a5f5f311127f747ef6f62c09 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -46,7 +45,6 @@
        soc8323@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
                
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                        reg = <80 80>;
-                       built-in;
                        big-endian;
                        interrupts = <20 8 21 8>; //high:32 low:33
                        interrupt-parent = < &ipic >;
index 7c4beff3e20005784870c1e9bfb572b1ef907b9c..01393e6d7da976741c72216fe06c13df6aab0de0 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -41,7 +40,6 @@
        soc8323@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
 
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                        reg = <80 80>;
-                       built-in;
                        big-endian;
                        interrupts = <20 8 21 8>; //high:32 low:33
                        interrupt-parent = <&pic>;
index 502f47c01797215f80fb2f8cef3938c152a149c5..f98c785081bfd23a5df404e9d2022b0b2c1263a8 100644 (file)
@@ -28,7 +28,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
@@ -40,7 +39,6 @@
        soc8349@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
        };
index 0b8387141d8881e31d638de1293b82a7c1f1ea48..7c89ff7f6a37d6879b777e8a2d5d08418d2d5139 100644 (file)
@@ -28,7 +28,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
@@ -40,7 +39,6 @@
        soc8349@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
        };
index 481099756e44af714a84fa57a4f2234f2c101302..f4ba857754098941b81ac4f05fdd5c6fd493bd94 100644 (file)
@@ -29,7 +29,6 @@
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
-                       32-bit;
                };
        };
 
@@ -46,7 +45,6 @@
        soc8349@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
        };
index e3f7c128206889b7ae4c6cc8c82f9705b769e19f..f14e88ee0f1cf1d748a6cf2ac254822c8dabaff4 100644 (file)
@@ -34,7 +34,6 @@
                        timebase-frequency = <3EF1480>;
                        bus-frequency = <FBC5200>;
                        clock-frequency = <1F78A400>;
-                       32-bit;
                };
        };
 
@@ -51,7 +50,6 @@
        soc8360@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <700 100>;
-                       built-in;
                        device_type = "ipic";
                };
 
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                        reg = <80 80>;
-                       built-in;
                        big-endian;
                        interrupts = <20 8 21 8>; //high:32 low:33
                        interrupt-parent = < &ipic >;
index fc8dff9f6201e334a55b02bcc99fafad677f0f8c..e038c04b42203ad3fb1b539acc674fb98bac484f 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;       //  33 MHz, from uboot
                        bus-frequency = <0>;    // 166 MHz
                        clock-frequency = <0>;  // 825 MHz, from uboot
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8540@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00100000>;      // CCSRBAR 1M
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                        big-endian;
index fb0b647f8c2a69966e21ae36418a19fbddc8a144..98afd4df27bf5f067908f99937041d61ee58430a 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;       //  33 MHz, from uboot
                        bus-frequency = <0>;    // 166 MHz
                        clock-frequency = <0>;  // 825 MHz, from uboot
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8541@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00100000>;      // CCSRBAR 1M
                        device_type = "pci";
 
                        i8259@19000 {
-                               clock-frequency = <0>;
                                interrupt-controller;
                                device_type = "interrupt-controller";
                                reg = <19000 0 0 0 1>;
                                #address-cells = <0>;
                                #interrupt-cells = <2>;
-                               built-in;
                                compatible = "chrp,iic";
-                               big-endian;
                                interrupts = <1>;
                                interrupt-parent = <&pci1>;
                        };
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                         big-endian;
index 3e79bf0a3159c8422281f73d99a1586ee5f072f2..88082ac6f2cdb6dce7ea8b8e8c37fdaa85f730bf 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8544@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
 
 
                                                        reg = <1 20 2
                                                               1 a0 2
                                                               1 4d0 2>;
-                                                       clock-frequency = <0>;
                                                        interrupt-controller;
                                                        device_type = "interrupt-controller";
                                                        #address-cells = <0>;
                                                        #interrupt-cells = <2>;
-                                                       built-in;
                                                        compatible = "chrp,iic";
                                                        interrupts = <9 2>;
                                                        interrupt-parent = <&mpic>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                        big-endian;
index d215d21fff42bdb01ffd7a09f881d379987d6ba0..11b823595a08a77eb05c4754d4533b31359f290a 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;       //  33 MHz, from uboot
                        bus-frequency = <0>;    // 166 MHz
                        clock-frequency = <0>;  // 825 MHz, from uboot
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8548@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <00001000 e0001000 000ff000
                          80000000 80000000 10000000
                                        interrupt-parent = <&i8259>;
 
                                        i8259: interrupt-controller@20 {
-                                               clock-frequency = <0>;
                                                interrupt-controller;
                                                device_type = "interrupt-controller";
                                                reg = <1 20 2
                                                       1 4d0 2>;
                                                #address-cells = <0>;
                                                #interrupt-cells = <2>;
-                                               built-in;
                                                compatible = "chrp,iic";
                                                interrupts = <0 1>;
                                                interrupt-parent = <&mpic>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                         big-endian;
index c3c8882521216eb8e9abb3f86af968a56a02aaf0..ce11d11293d082e8728a26de1297f36bc926b613 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;       //  33 MHz, from uboot
                        bus-frequency = <0>;    // 166 MHz
                        clock-frequency = <0>;  // 825 MHz, from uboot
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8555@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00100000>;      // CCSRBAR 1M
                        device_type = "pci";
 
                        i8259@19000 {
-                               clock-frequency = <0>;
                                interrupt-controller;
                                device_type = "interrupt-controller";
                                reg = <19000 0 0 0 1>;
                                #address-cells = <0>;
                                #interrupt-cells = <2>;
-                               built-in;
                                compatible = "chrp,iic";
-                               big-endian;
                                interrupts = <1>;
                                interrupt-parent = <&pci1>;
                        };
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                         big-endian;
index 16dbe848cecf26db2d1b055cc5a92c1333f05ba0..cf87c30cf6a868a085b96078edaf39484fa777ce 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <04ead9a0>;
                        bus-frequency = <13ab6680>;
                        clock-frequency = <312c8040>;
-                       32-bit;
                };
        };
 
@@ -42,7 +41,6 @@
        soc8560@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00000200>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        device_type = "open-pic";
                };
 
                cpm@e0000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       #interrupt-cells = <2>;
                        device_type = "cpm";
                        model = "CPM2";
                        ranges = <0 0 c0000>;
                                interrupts = <2e 2>;
                                interrupt-parent = <&mpic>;
                                reg = <90c00 80>;
-                               built-in;
                                device_type = "cpm-pic";
                        };
 
index b1dcfbe8c1f8632b636ea1fe89215bc551862646..c472a4b488e963862fd6ee6b32fc19c194c10633 100644 (file)
@@ -34,7 +34,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                };
        };
 
@@ -51,7 +50,6 @@
        soc8568@e0000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 e0000000 00100000>;
                reg = <e0000000 00100000>;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                         big-endian;
                        #address-cells = <0>;
                        #interrupt-cells = <1>;
                        reg = <80 80>;
-                       built-in;
                        big-endian;
                        interrupts = <2e 2 2e 2>; //high:30 low:30
                        interrupt-parent = <&mpic>;
index b0166e5c177e49d499ce4deab88a1eaa9c457a4c..4d53d9bc3a9d2342cb78addb83a25e22951b22f8 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;       // 33 MHz, from uboot
                        bus-frequency = <0>;            // From uboot
                        clock-frequency = <0>;          // From uboot
-                       32-bit;
                };
                PowerPC,8641@1 {
                        device_type = "cpu";
@@ -42,7 +41,6 @@
                        timebase-frequency = <0>;       // 33 MHz, from uboot
                        bus-frequency = <0>;            // From uboot
                        clock-frequency = <0>;          // From uboot
-                       32-bit;
                };
        };
 
@@ -54,7 +52,6 @@
        soc8641@f8000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <00001000 f8001000 000ff000
                          80000000 80000000 20000000
                                                        reg = <1 20 2
                                                               1 a0 2
                                                               1 4d0 2>;
-                                                       clock-frequency = <0>;
                                                        interrupt-controller;
                                                        device_type = "interrupt-controller";
                                                        #address-cells = <0>;
                                                        #interrupt-cells = <2>;
-                                                       built-in;
                                                        compatible = "chrp,iic";
                                                        interrupts = <9 2>;
                                                        interrupt-parent =
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <40000 40000>;
-                       built-in;
                        compatible = "chrp,open-pic";
                        device_type = "open-pic";
                        big-endian;
index e5e7726ddb0345ea1212e8d1806b05266ba7f866..90f2293ed3cde4b221136a0eaba5dad51b7bf6f7 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                        interrupts = <f 2>;     // decrementer interrupt
                        interrupt-parent = <&Mpc8xx_pic>;
                };
@@ -44,7 +43,6 @@
        soc866@ff000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 ff000000 00100000>;
                reg = <ff000000 00000200>;
@@ -78,7 +76,6 @@
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <0 24>;
-                       built-in;
                        device_type = "mpc8xx-pic";
                        compatible = "CPM";
                };
@@ -86,7 +83,6 @@
                cpm@ff000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       #interrupt-cells = <2>;
                        device_type = "cpm";
                        model = "CPM";
                        ranges = <0 0 4000>;
                                interrupts = <5 2 0 2>;
                                interrupt-parent = <&Mpc8xx_pic>;
                                reg = <930 20>;
-                               built-in;
                                device_type = "cpm-pic";
                                compatible = "CPM";
                        };
index dc7ab9c80611567baa497dffbe42d89e040e68e8..e9aa9d00da24b826c8683b8bfe0e18d6be9f99d9 100644 (file)
@@ -30,7 +30,6 @@
                        timebase-frequency = <0>;
                        bus-frequency = <0>;
                        clock-frequency = <0>;
-                       32-bit;
                        interrupts = <f 2>;     // decrementer interrupt
                        interrupt-parent = <&Mpc8xx_pic>;
                };
@@ -44,7 +43,6 @@
        soc885@ff000000 {
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <2>;
                device_type = "soc";
                ranges = <0 ff000000 00100000>;
                reg = <ff000000 00000200>;
@@ -98,7 +96,6 @@
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <0 24>;
-                       built-in;
                        device_type = "mpc8xx-pic";
                        compatible = "CPM";
                };
                cpm@ff000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       #interrupt-cells = <2>;
                        device_type = "cpm";
                        model = "CPM";
                        ranges = <0 0 4000>;
                                interrupts = <5 2 0 2>;
                                interrupt-parent = <&Mpc8xx_pic>;
                                reg = <930 20>;
-                               built-in;
                                device_type = "cpm-pic";
                                compatible = "CPM";
                        };
index e416ea67be495cca6a0d10f6c3b71d1699cf1a59..297dfa53fe9e488be0c5532c50987dc711b25257 100644 (file)
@@ -43,7 +43,6 @@
        mv64x60@f1000000 { /* Marvell Discovery */
                #address-cells = <1>;
                #size-cells = <1>;
-               #interrupt-cells = <1>;
                model = "mv64360";                      /* Default */
                compatible = "marvell,mv64x60";
                clock-frequency = <7f28155>;            /* 133.333333 MHz */