If unsure, say N.
config SCSI_SATA_VITESSE
- tristate "VITESSE VSC-7174 SATA support"
+ tristate "VITESSE VSC-7174 / INTEL 31244 SATA support"
depends on SCSI_SATA && PCI
help
- This option enables support for Vitesse VSC7174 Serial ATA.
+ This option enables support for Vitesse VSC7174 and Intel 31244 Serial ATA.
If unsure, say N.
goto err_out_regions;
}
+ /* FIXME: If we get no DMA mask we should fall back to PIO */
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
if (rc)
goto err_out_regions;
return rc;
}
+/**
+ * ata_pci_clear_simplex - attempt to kick device out of simplex
+ * @pdev: PCI device
+ *
+ * Some PCI ATA devices report simplex mode but in fact can be told to
+ * enter non simplex mode. This implements the neccessary logic to
+ * perform the task on such devices. Calling it on other devices will
+ * have -undefined- behaviour.
+ */
+
+int ata_pci_clear_simplex(struct pci_dev *pdev)
+{
+ unsigned long bmdma = pci_resource_start(pdev, 4);
+ u8 simplex;
+
+ if (bmdma == 0)
+ return -ENOENT;
+
+ simplex = inb(bmdma + 0x02);
+ outb(simplex & 0x60, bmdma + 0x02);
+ simplex = inb(bmdma + 0x02);
+ if (simplex & 0x80)
+ return -EOPNOTSUPP;
+ return 0;
+}
+
+unsigned long ata_pci_default_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long xfer_mask)
+{
+ /* Filter out DMA modes if the device has been configured by
+ the BIOS as PIO only */
+
+ if (ap->ioaddr.bmdma_addr == 0)
+ xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
+ return xfer_mask;
+}
+
#endif /* CONFIG_PCI */
spin_unlock_irqrestore(&ap->host_set->lock, flags);
if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
+ ata_port_flush_task(ap);
+
spin_lock_irqsave(&ap->host_set->lock, flags);
/* We're racing with irq here. If we lose, the
continue;
if (!dev->pio_mode) {
- printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
+ printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
return -1;
}
ata_fill_sg(qc);
}
+void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
+
/**
* ata_sg_init_one - Associate command with memory buffer
* @qc: Command to be associated
case ATA_PROT_ATAPI:
case ATA_PROT_PIO:
- case ATA_PROT_PIO_MULT:
if (ap->flags & ATA_FLAG_PIO_DMA)
return 1;
void ata_bmdma_irq_clear(struct ata_port *ap)
{
- if (ap->flags & ATA_FLAG_MMIO) {
- void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
- writeb(readb(mmio), mmio);
- } else {
- unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
- outb(inb(addr), addr);
- }
+ if (!ap->ioaddr.bmdma_addr)
+ return;
+ if (ap->flags & ATA_FLAG_MMIO) {
+ void __iomem *mmio =
+ ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
+ writeb(readb(mmio), mmio);
+ } else {
+ unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
+ outb(inb(addr), addr);
+ }
}
#ifdef ATA_IRQ_TRAP
if ((ap->stats.idle_irq % 1000) == 0) {
- handled = 1;
ata_irq_ack(ap, 0); /* debug trap */
printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
+ return 1;
}
#endif
return 0; /* irq not handled */
EXPORT_SYMBOL_GPL(ata_host_stop);
EXPORT_SYMBOL_GPL(ata_interrupt);
EXPORT_SYMBOL_GPL(ata_qc_prep);
+EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
EXPORT_SYMBOL_GPL(ata_bmdma_setup);
EXPORT_SYMBOL_GPL(ata_bmdma_start);
EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
printk(KERN_WARNING "ata%u: no sense translation for status: 0x%02x\n",
id, drv_stat);
- /* For our last chance pick, use medium read error because
- * it's much more common than an ATA drive telling you a write
- * has failed.
- */
- *sk = MEDIUM_ERROR;
- *asc = 0x11; /* "unrecovered read error" */
- *ascq = 0x04; /* "auto-reallocation failed" */
+ /* We need a sensible error return here, which is tricky, and one
+ that won't cause people to do things like return a disk wrongly */
+ *sk = ABORTED_COMMAND;
+ *asc = 0x00;
+ *ascq = 0x00;
translate_done:
printk(KERN_ERR "ata%u: translated ATA stat/err 0x%02x/%02x to "
}
}
+static void ata_scsi_sdev_config(struct scsi_device *sdev)
+{
+ sdev->use_10_for_rw = 1;
+ sdev->use_10_for_ms = 1;
+}
+
+static void ata_scsi_dev_config(struct scsi_device *sdev,
+ struct ata_device *dev)
+{
+ unsigned int max_sectors;
+
+ /* TODO: 2048 is an arbitrary number, not the
+ * hardware maximum. This should be increased to
+ * 65534 when Jens Axboe's patch for dynamically
+ * determining max_sectors is merged.
+ */
+ max_sectors = ATA_MAX_SECTORS;
+ if (dev->flags & ATA_DFLAG_LBA48)
+ max_sectors = 2048;
+ if (dev->max_sectors)
+ max_sectors = dev->max_sectors;
+
+ blk_queue_max_sectors(sdev->request_queue, max_sectors);
+
+ /*
+ * SATA DMA transfers must be multiples of 4 byte, so
+ * we need to pad ATAPI transfers using an extra sg.
+ * Decrement max hw segments accordingly.
+ */
+ if (dev->class == ATA_DEV_ATAPI) {
+ request_queue_t *q = sdev->request_queue;
+ blk_queue_max_hw_segments(q, q->max_hw_segments - 1);
+ }
+}
+
/**
* ata_scsi_slave_config - Set SCSI device attributes
* @sdev: SCSI device to examine
int ata_scsi_slave_config(struct scsi_device *sdev)
{
- sdev->use_10_for_rw = 1;
- sdev->use_10_for_ms = 1;
+ ata_scsi_sdev_config(sdev);
blk_queue_max_phys_segments(sdev->request_queue, LIBATA_MAX_PRD);
if (sdev->id < ATA_MAX_DEVICES) {
struct ata_port *ap;
struct ata_device *dev;
- unsigned int max_sectors;
ap = (struct ata_port *) &sdev->host->hostdata[0];
dev = &ap->device[sdev->id];
- /* TODO: 2048 is an arbitrary number, not the
- * hardware maximum. This should be increased to
- * 65534 when Jens Axboe's patch for dynamically
- * determining max_sectors is merged.
- */
- max_sectors = ATA_MAX_SECTORS;
- if (dev->flags & ATA_DFLAG_LBA48)
- max_sectors = 2048;
- if (dev->max_sectors)
- max_sectors = dev->max_sectors;
-
- blk_queue_max_sectors(sdev->request_queue, max_sectors);
-
- /*
- * SATA DMA transfers must be multiples of 4 byte, so
- * we need to pad ATAPI transfers using an extra sg.
- * Decrement max hw segments accordingly.
- */
- if (dev->class == ATA_DEV_ATAPI) {
- request_queue_t *q = sdev->request_queue;
- blk_queue_max_hw_segments(q, q->max_hw_segments - 1);
- }
+ ata_scsi_dev_config(sdev, dev);
}
return 0; /* scsi layer doesn't check return value, sigh */
* @buflen: Response buffer length.
*
* Returns standard device identification data associated
- * with non-EVPD INQUIRY command output.
+ * with non-VPD INQUIRY command output.
*
* LOCKING:
* spin_lock_irqsave(host_set lock)
}
/**
- * ata_scsiop_inq_00 - Simulate INQUIRY EVPD page 0, list of pages
+ * ata_scsiop_inq_00 - Simulate INQUIRY VPD page 0, list of pages
* @args: device IDENTIFY data / SCSI command of interest.
* @rbuf: Response buffer, to which simulated SCSI cmd output is sent.
* @buflen: Response buffer length.
*
- * Returns list of inquiry EVPD pages available.
+ * Returns list of inquiry VPD pages available.
*
* LOCKING:
* spin_lock_irqsave(host_set lock)
0x80, /* page 0x80, unit serial no page */
0x83 /* page 0x83, device ident page */
};
- rbuf[3] = sizeof(pages); /* number of supported EVPD pages */
+ rbuf[3] = sizeof(pages); /* number of supported VPD pages */
if (buflen > 6)
memcpy(rbuf + 4, pages, sizeof(pages));
}
/**
- * ata_scsiop_inq_80 - Simulate INQUIRY EVPD page 80, device serial number
+ * ata_scsiop_inq_80 - Simulate INQUIRY VPD page 80, device serial number
* @args: device IDENTIFY data / SCSI command of interest.
* @rbuf: Response buffer, to which simulated SCSI cmd output is sent.
* @buflen: Response buffer length.
return 0;
}
-static const char * const inq_83_str = "Linux ATA-SCSI simulator";
-
/**
- * ata_scsiop_inq_83 - Simulate INQUIRY EVPD page 83, device identity
+ * ata_scsiop_inq_83 - Simulate INQUIRY VPD page 83, device identity
* @args: device IDENTIFY data / SCSI command of interest.
* @rbuf: Response buffer, to which simulated SCSI cmd output is sent.
* @buflen: Response buffer length.
*
- * Returns device identification. Currently hardcoded to
- * return "Linux ATA-SCSI simulator".
+ * Yields two logical unit device identification designators:
+ * - vendor specific ASCII containing the ATA serial number
+ * - SAT defined "t10 vendor id based" containing ASCII vendor
+ * name ("ATA "), model and serial numbers.
*
* LOCKING:
* spin_lock_irqsave(host_set lock)
unsigned int ata_scsiop_inq_83(struct ata_scsi_args *args, u8 *rbuf,
unsigned int buflen)
{
- rbuf[1] = 0x83; /* this page code */
- rbuf[3] = 4 + strlen(inq_83_str); /* page len */
+ int num;
+ const int sat_model_serial_desc_len = 68;
+ const int ata_model_byte_len = 40;
- /* our one and only identification descriptor (vendor-specific) */
- if (buflen > (strlen(inq_83_str) + 4 + 4 - 1)) {
- rbuf[4 + 0] = 2; /* code set: ASCII */
- rbuf[4 + 3] = strlen(inq_83_str);
- memcpy(rbuf + 4 + 4, inq_83_str, strlen(inq_83_str));
+ rbuf[1] = 0x83; /* this page code */
+ num = 4;
+
+ if (buflen > (ATA_SERNO_LEN + num + 3)) {
+ /* piv=0, assoc=lu, code_set=ACSII, designator=vendor */
+ rbuf[num + 0] = 2;
+ rbuf[num + 3] = ATA_SERNO_LEN;
+ num += 4;
+ ata_id_string(args->id, (unsigned char *) rbuf + num,
+ ATA_ID_SERNO_OFS, ATA_SERNO_LEN);
+ num += ATA_SERNO_LEN;
}
-
+ if (buflen > (sat_model_serial_desc_len + num + 3)) {
+ /* SAT defined lu model and serial numbers descriptor */
+ /* piv=0, assoc=lu, code_set=ACSII, designator=t10 vendor id */
+ rbuf[num + 0] = 2;
+ rbuf[num + 1] = 1;
+ rbuf[num + 3] = sat_model_serial_desc_len;
+ num += 4;
+ memcpy(rbuf + num, "ATA ", 8);
+ num += 8;
+ ata_id_string(args->id, (unsigned char *) rbuf + num,
+ ATA_ID_PROD_OFS, ata_model_byte_len);
+ num += ata_model_byte_len;
+ ata_id_string(args->id, (unsigned char *) rbuf + num,
+ ATA_ID_SERNO_OFS, ATA_SERNO_LEN);
+ num += ATA_SERNO_LEN;
+ }
+ rbuf[3] = num - 4; /* page len (assume less than 256 bytes) */
return 0;
}
case 4: /* PIO Data-in */
case 5: /* PIO Data-out */
- if (byte1 & 0xe0) {
- return ATA_PROT_PIO_MULT;
- }
return ATA_PROT_PIO;
case 10: /* Device Reset */
if ((tf->protocol = ata_scsi_map_proto(scsicmd[1])) == ATA_PROT_UNKNOWN)
goto invalid_fld;
+ if (scsicmd[1] & 0xe0)
+ /* PIO multi not supported yet */
+ goto invalid_fld;
+
/*
* 12 and 16 byte CDBs use different offsets to
* provide the various register values.
= (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
i += 4;
- VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", nelem,
+ VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
(unsigned long)addr, len);
}
return i;
void __iomem *port_mmio = mv_ap_base(ap);
struct mv_port_priv *pp = ap->private_data;
u32 out_ptr;
+ u8 ata_status;
out_ptr = readl(port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
WARN_ON(((out_ptr >> EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) !=
pp->rsp_consumer);
+ ata_status = pp->crpb[pp->rsp_consumer].flags >> CRPB_FLAG_STATUS_SHIFT;
+
/* increment our consumer index... */
pp->rsp_consumer = mv_inc_q_index(&pp->rsp_consumer);
writelfl(out_ptr, port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
/* Return ATA status register for completed CRPB */
- return (pp->crpb[pp->rsp_consumer].flags >> CRPB_FLAG_STATUS_SHIFT);
+ return ata_status;
}
/**
#define DRV_NAME "sata_svw"
#define DRV_VERSION "1.07"
-/* Taskfile registers offsets */
-#define K2_SATA_TF_CMD_OFFSET 0x00
-#define K2_SATA_TF_DATA_OFFSET 0x00
-#define K2_SATA_TF_ERROR_OFFSET 0x04
-#define K2_SATA_TF_NSECT_OFFSET 0x08
-#define K2_SATA_TF_LBAL_OFFSET 0x0c
-#define K2_SATA_TF_LBAM_OFFSET 0x10
-#define K2_SATA_TF_LBAH_OFFSET 0x14
-#define K2_SATA_TF_DEVICE_OFFSET 0x18
-#define K2_SATA_TF_CMDSTAT_OFFSET 0x1c
-#define K2_SATA_TF_CTL_OFFSET 0x20
-
-/* DMA base */
-#define K2_SATA_DMA_CMD_OFFSET 0x30
-
-/* SCRs base */
-#define K2_SATA_SCR_STATUS_OFFSET 0x40
-#define K2_SATA_SCR_ERROR_OFFSET 0x44
-#define K2_SATA_SCR_CONTROL_OFFSET 0x48
-
-/* Others */
-#define K2_SATA_SICR1_OFFSET 0x80
-#define K2_SATA_SICR2_OFFSET 0x84
-#define K2_SATA_SIM_OFFSET 0x88
-
-/* Port stride */
-#define K2_SATA_PORT_OFFSET 0x100
+enum {
+ /* Taskfile registers offsets */
+ K2_SATA_TF_CMD_OFFSET = 0x00,
+ K2_SATA_TF_DATA_OFFSET = 0x00,
+ K2_SATA_TF_ERROR_OFFSET = 0x04,
+ K2_SATA_TF_NSECT_OFFSET = 0x08,
+ K2_SATA_TF_LBAL_OFFSET = 0x0c,
+ K2_SATA_TF_LBAM_OFFSET = 0x10,
+ K2_SATA_TF_LBAH_OFFSET = 0x14,
+ K2_SATA_TF_DEVICE_OFFSET = 0x18,
+ K2_SATA_TF_CMDSTAT_OFFSET = 0x1c,
+ K2_SATA_TF_CTL_OFFSET = 0x20,
+
+ /* DMA base */
+ K2_SATA_DMA_CMD_OFFSET = 0x30,
+
+ /* SCRs base */
+ K2_SATA_SCR_STATUS_OFFSET = 0x40,
+ K2_SATA_SCR_ERROR_OFFSET = 0x44,
+ K2_SATA_SCR_CONTROL_OFFSET = 0x48,
+
+ /* Others */
+ K2_SATA_SICR1_OFFSET = 0x80,
+ K2_SATA_SICR2_OFFSET = 0x84,
+ K2_SATA_SIM_OFFSET = 0x88,
+
+ /* Port stride */
+ K2_SATA_PORT_OFFSET = 0x100,
+};
static u8 k2_stat_check_status(struct ata_port *ap);
#include <linux/libata.h>
#define DRV_NAME "sata_vsc"
-#define DRV_VERSION "1.1"
-
-/* Interrupt register offsets (from chip base address) */
-#define VSC_SATA_INT_STAT_OFFSET 0x00
-#define VSC_SATA_INT_MASK_OFFSET 0x04
-
-/* Taskfile registers offsets */
-#define VSC_SATA_TF_CMD_OFFSET 0x00
-#define VSC_SATA_TF_DATA_OFFSET 0x00
-#define VSC_SATA_TF_ERROR_OFFSET 0x04
-#define VSC_SATA_TF_FEATURE_OFFSET 0x06
-#define VSC_SATA_TF_NSECT_OFFSET 0x08
-#define VSC_SATA_TF_LBAL_OFFSET 0x0c
-#define VSC_SATA_TF_LBAM_OFFSET 0x10
-#define VSC_SATA_TF_LBAH_OFFSET 0x14
-#define VSC_SATA_TF_DEVICE_OFFSET 0x18
-#define VSC_SATA_TF_STATUS_OFFSET 0x1c
-#define VSC_SATA_TF_COMMAND_OFFSET 0x1d
-#define VSC_SATA_TF_ALTSTATUS_OFFSET 0x28
-#define VSC_SATA_TF_CTL_OFFSET 0x29
-
-/* DMA base */
-#define VSC_SATA_UP_DESCRIPTOR_OFFSET 0x64
-#define VSC_SATA_UP_DATA_BUFFER_OFFSET 0x6C
-#define VSC_SATA_DMA_CMD_OFFSET 0x70
-
-/* SCRs base */
-#define VSC_SATA_SCR_STATUS_OFFSET 0x100
-#define VSC_SATA_SCR_ERROR_OFFSET 0x104
-#define VSC_SATA_SCR_CONTROL_OFFSET 0x108
-
-/* Port stride */
-#define VSC_SATA_PORT_OFFSET 0x200
-
-/* Error interrupt status bit offsets */
-#define VSC_SATA_INT_ERROR_E_OFFSET 2
-#define VSC_SATA_INT_ERROR_P_OFFSET 4
-#define VSC_SATA_INT_ERROR_T_OFFSET 5
-#define VSC_SATA_INT_ERROR_M_OFFSET 1
+#define DRV_VERSION "1.2"
+
+enum {
+ /* Interrupt register offsets (from chip base address) */
+ VSC_SATA_INT_STAT_OFFSET = 0x00,
+ VSC_SATA_INT_MASK_OFFSET = 0x04,
+
+ /* Taskfile registers offsets */
+ VSC_SATA_TF_CMD_OFFSET = 0x00,
+ VSC_SATA_TF_DATA_OFFSET = 0x00,
+ VSC_SATA_TF_ERROR_OFFSET = 0x04,
+ VSC_SATA_TF_FEATURE_OFFSET = 0x06,
+ VSC_SATA_TF_NSECT_OFFSET = 0x08,
+ VSC_SATA_TF_LBAL_OFFSET = 0x0c,
+ VSC_SATA_TF_LBAM_OFFSET = 0x10,
+ VSC_SATA_TF_LBAH_OFFSET = 0x14,
+ VSC_SATA_TF_DEVICE_OFFSET = 0x18,
+ VSC_SATA_TF_STATUS_OFFSET = 0x1c,
+ VSC_SATA_TF_COMMAND_OFFSET = 0x1d,
+ VSC_SATA_TF_ALTSTATUS_OFFSET = 0x28,
+ VSC_SATA_TF_CTL_OFFSET = 0x29,
+
+ /* DMA base */
+ VSC_SATA_UP_DESCRIPTOR_OFFSET = 0x64,
+ VSC_SATA_UP_DATA_BUFFER_OFFSET = 0x6C,
+ VSC_SATA_DMA_CMD_OFFSET = 0x70,
+
+ /* SCRs base */
+ VSC_SATA_SCR_STATUS_OFFSET = 0x100,
+ VSC_SATA_SCR_ERROR_OFFSET = 0x104,
+ VSC_SATA_SCR_CONTROL_OFFSET = 0x108,
+
+ /* Port stride */
+ VSC_SATA_PORT_OFFSET = 0x200,
+
+ /* Error interrupt status bit offsets */
+ VSC_SATA_INT_ERROR_CRC = 0x40,
+ VSC_SATA_INT_ERROR_T = 0x20,
+ VSC_SATA_INT_ERROR_P = 0x10,
+ VSC_SATA_INT_ERROR_R = 0x8,
+ VSC_SATA_INT_ERROR_E = 0x4,
+ VSC_SATA_INT_ERROR_M = 0x2,
+ VSC_SATA_INT_PHY_CHANGE = 0x1,
+ VSC_SATA_INT_ERROR = (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \
+ VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \
+ VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \
+ VSC_SATA_INT_PHY_CHANGE),
+};
+
+
#define is_vsc_sata_int_err(port_idx, int_status) \
- (int_status & ((1 << (VSC_SATA_INT_ERROR_E_OFFSET + (8 * port_idx))) | \
- (1 << (VSC_SATA_INT_ERROR_P_OFFSET + (8 * port_idx))) | \
- (1 << (VSC_SATA_INT_ERROR_T_OFFSET + (8 * port_idx))) | \
- (1 << (VSC_SATA_INT_ERROR_M_OFFSET + (8 * port_idx))) \
- )\
- )
+ (int_status & (VSC_SATA_INT_ERROR << (8 * port_idx)))
static u32 vsc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
ap = host_set->ports[i];
- if (is_vsc_sata_int_err(i, int_status)) {
- u32 err_status;
- printk(KERN_DEBUG "%s: ignoring interrupt(s)\n", __FUNCTION__);
- err_status = ap ? vsc_sata_scr_read(ap, SCR_ERROR) : 0;
- vsc_sata_scr_write(ap, SCR_ERROR, err_status);
- handled++;
- }
-
if (ap && !(ap->flags &
(ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) {
struct ata_queued_cmd *qc;
qc = ata_qc_from_tag(ap, ap->active_tag);
if (qc && (!(qc->tf.ctl & ATA_NIEN))) {
handled += ata_host_intr(ap, qc);
- } else {
- printk(KERN_DEBUG "%s: ignoring interrupt(s)\n", __FUNCTION__);
+ } else if (is_vsc_sata_int_err(i, int_status)) {
+ /*
+ * On some chips (i.e. Intel 31244), an error
+ * interrupt will sneak in at initialization
+ * time (phy state changes). Clearing the SCR
+ * error register is not required, but it prevents
+ * the phy state change interrupts from recurring
+ * later.
+ */
+ u32 err_status;
+ err_status = vsc_sata_scr_read(ap, SCR_ERROR);
+ printk(KERN_DEBUG "%s: clearing interrupt, "
+ "status %x; sata err status %x\n",
+ __FUNCTION__,
+ int_status, err_status);
+ vsc_sata_scr_write(ap, SCR_ERROR, err_status);
+ /* Clear interrupt status */
ata_chk_status(ap);
handled++;
}
-
}
}
}
ATA_CMD_STANDBYNOW1 = 0xE0,
ATA_CMD_IDLEIMMEDIATE = 0xE1,
ATA_CMD_INIT_DEV_PARAMS = 0x91,
+ ATA_CMD_READ_NATIVE_MAX = 0xF8,
+ ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
/* SETFEATURES stuff */
SETFEATURES_XFER = 0x03,
ATA_PROT_UNKNOWN, /* unknown/invalid */
ATA_PROT_NODATA, /* no data */
ATA_PROT_PIO, /* PIO single sector */
- ATA_PROT_PIO_MULT, /* PIO multiple sector */
ATA_PROT_DMA, /* DMA */
ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
ATA_PROT_ATAPI_NODATA, /* packet command, no data */
};
#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
+#define ata_id_is_cfa(id) ((id)[0] == 0x848A)
#define ata_id_is_sata(id) ((id)[93] == 0)
#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
+#define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10))
#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
+#define ata_id_has_hpa(id) ((id)[82] & (1 << 10))
#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
#define ata_id_removeable(id) ((id)[0] & (1 << 7))
+#define ata_id_has_dword_io(id) ((id)[50] & (1 << 0))
#define ata_id_u32(id,n) \
(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
#define ata_id_u64(id,n) \
extern void ata_pci_remove_one (struct pci_dev *pdev);
extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
extern int ata_pci_device_resume(struct pci_dev *pdev);
+extern int ata_pci_clear_simplex(struct pci_dev *pdev);
#endif /* CONFIG_PCI */
extern int ata_device_add(const struct ata_probe_ent *ent);
extern void ata_host_set_remove(struct ata_host_set *host_set);
extern void ata_host_stop (struct ata_host_set *host_set);
extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
extern void ata_qc_prep(struct ata_queued_cmd *qc);
+extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
unsigned int buflen);
extern struct ata_probe_ent *
ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
-
+extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
#endif /* CONFIG_PCI */
projects / firefly-linux-kernel-4.4.55.git / commitdiff