ARM64: dts: rk3366-tb: correct reset pin for Ethernet PHY
authorRoger Chen <roger.chen@rock-chips.com>
Fri, 4 Mar 2016 06:19:03 +0000 (14:19 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 4 Mar 2016 10:10:20 +0000 (18:10 +0800)
Change-Id: I94c1f22880965ab69865eeb81c0a33fa4f4201b4
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3366-tb.dts

index 85b1fee3a54ebfd7e99ec8a9eaf216297cbb8eab..9ce246f5044e3c6e9be3a27d31d629eeccd2b382 100644 (file)
        vcc_phy: vcc-phy-regulator {
                compatible = "regulator-fixed";
                enable-active-high;
-               gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+               gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
                pinctrl-0 = <&eth_phy_pwr>;
                regulator-name = "vcc_phy";
 };
 
 &gmac {
-       phy_regulator = "vcc_phy";
+       phy-supply = <&vcc_phy>;
        phy-mode = "rgmii";
        clock_in_out = "input";
-       snps,reset-gpio = <&gpio2 15 0>;
+       snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
        snps,reset-active-low;
-       snps,reset-delays-us = <0 10000 1000000>;
+       snps,reset-delays-us = <0 10000 50000>;
        assigned-clocks = <&cru SCLK_MAC>;
        assigned-clock-parents = <&ext_gmac>;
        pinctrl-names = "default";