decl += ".b8 ";
decl += gvsym->getName();
decl += "[";
-
+
if (elementTy->isArrayTy())
{
assert(elementTy->isArrayTy() && "Only pointers to arrays are supported");
elementTy = arrayTy->getElementType();
unsigned numElements = arrayTy->getNumElements();
-
+
while (elementTy->isArrayTy()) {
arrayTy = dyn_cast<const ArrayType>(elementTy);
// Compute the size of the array, in bytes.
uint64_t arraySize = (elementTy->getPrimitiveSizeInBits() >> 3)
* numElements;
-
+
decl += utostr(arraySize);
}
-
+
decl += "]";
-
+
// handle string constants (assume ConstantArray means string)
-
+
if (gv->hasInitializer())
{
Constant *C = gv->getInitializer();
for (unsigned i = 0, e = C->getNumOperands(); i != e; ++i)
{
if (i > 0) decl += ",";
-
- decl += "0x" + utohexstr(cast<ConstantInt>(CA->getOperand(i))->getZExtValue());
+
+ decl += "0x" +
+ utohexstr(cast<ConstantInt>(CA->getOperand(i))->getZExtValue());
}
-
+
decl += "}";
}
}
addRegisterClass(MVT::f64, PTX::RRegf64RegisterClass);
setBooleanContents(ZeroOrOneBooleanContent);
-
+
setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
setOperationAction(ISD::ConstantFP, MVT::f64, Legal);
-
+
// Turn i16 (z)extload into load + (z)extend
setLoadExtAction(ISD::EXTLOAD, MVT::i16, Expand);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand);
// Turn f32 extload into load + fextend
setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
-
+
// Turn f64 truncstore into trunc + store.
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
-
+
// Customize translation of memory addresses
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
-
+
// need to lower SETCC of Preds into bitwise logic
setOperationAction(ISD::SETCC, MVT::i1, Custom);
SDValue Op2 = Op.getOperand(2);
DebugLoc dl = Op.getDebugLoc();
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
-
+
// Look for X == 0, X == 1, X != 0, or X != 1
// We can simplify these to bitwise logic
-
+
if (Op1.getOpcode() == ISD::Constant &&
(cast<ConstantSDNode>(Op1)->getZExtValue() == 1 ||
cast<ConstantSDNode>(Op1)->isNullValue()) &&
(CC == ISD::SETEQ || CC == ISD::SETNE)) {
- return DAG.getNode(ISD::AND, dl, MVT::i1, Op0, Op1);
+ return DAG.getNode(ISD::AND, dl, MVT::i1, Op0, Op1);
}
-
+
return DAG.getNode(ISD::SETCC, dl, MVT::i1, Op0, Op1, Op2);
}
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
virtual SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
-
+
virtual SDValue
LowerFormalArguments(SDValue Chain,
CallingConv::ID CallConv,
const SmallVectorImpl<SDValue> &OutVals,
DebugLoc dl,
SelectionDAG &DAG) const;
-
+
virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
-
+
private:
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
}; // class PTXTargetLowering