ARM: mvebu: use new bindings for existing crypto devices
authorBoris Brezillon <boris.brezillon@free-electrons.com>
Tue, 18 Aug 2015 08:09:00 +0000 (10:09 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Fri, 9 Oct 2015 15:08:01 +0000 (17:08 +0200)
The new bindings split the crypto and sram node in two separate devices.
Modify the existing crypto nodes to match the new representation.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm/boot/dts/dove.dtsi
arch/arm/boot/dts/kirkwood.dtsi
arch/arm/boot/dts/orion5x.dtsi

index 179121630ad75a1456e7e4fc073d6f85977550d9..9bb31314f5e9d3363b5e44b65cbf26dc5ced661a 100644 (file)
 
                        crypto: crypto-engine@30000 {
                                compatible = "marvell,orion-crypto";
-                               reg = <0x30000 0x10000>,
-                                     <0xffffe000 0x800>;
-                               reg-names = "regs", "sram";
+                               reg = <0x30000 0x10000>;
+                               reg-names = "regs";
                                interrupts = <31>;
                                clocks = <&gate_clk 15>;
+                               marvell,crypto-srams = <&crypto_sram>;
+                               marvell,crypto-sram-size = <0x800>;
                                status = "okay";
                        };
 
                                interrupts = <47>;
                                status = "disabled";
                        };
+
+                       crypto_sram: sa-sram@ffffe000 {
+                               compatible = "mmio-sram";
+                               reg = <0xffffe000 0x800>;
+                               clocks = <&gate_clk 15>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                       };
                };
        };
 };
index 464f09a1a4a5bffebeb90eafcd0e251f962602c7..c5f913b5fe42786b18ee28368110b43fd90f5bbc 100644 (file)
                pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
                pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
 
-               cesa: crypto@0301 {
-                       compatible = "marvell,orion-crypto";
-                       reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
-                             <MBUS_ID(0x03, 0x01) 0 0x800>;
-                       reg-names = "regs", "sram";
-                       interrupts = <22>;
-                       clocks = <&gate_clk 17>;
-                       status = "okay";
-               };
-
                nand: nand@012f {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        pinctrl-names = "default";
                        status = "disabled";
                };
+
+               crypto_sram: sa-sram@0301 {
+                       compatible = "mmio-sram";
+                       reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
+                       clocks = <&gate_clk 17>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
        };
 
        ocp@f1000000 {
                        status = "okay";
                };
 
+               cesa: crypto@30000 {
+                       compatible = "marvell,orion-crypto";
+                       reg = <0x30000 0x10000>;
+                       reg-names = "regs";
+                       interrupts = <22>;
+                       clocks = <&gate_clk 17>;
+                       marvell,crypto-srams = <&crypto_sram>;
+                       marvell,crypto-sram-size = <0x800>;
+                       status = "okay";
+               };
+
                usb0: ehci@50000 {
                        compatible = "marvell,orion-ehci";
                        reg = <0x50000 0x1000>;
index 75cd01bd60241d0e0f06f2a390941c63a925e7bf..e1b6d2a2ac49e6097d6fe0566274e5ab792aef83 100644 (file)
                                status = "disabled";
                        };
 
+                       cesa: crypto@90000 {
+                               compatible = "marvell,orion-crypto";
+                               reg = <0x90000 0x10000>;
+                               reg-names = "regs";
+                               interrupts = <28>;
+                               marvell,crypto-srams = <&crypto_sram>;
+                               marvell,crypto-sram-size = <0x800>;
+                               status = "okay";
+                       };
+
                        ehci1: ehci@a0000 {
                                compatible = "marvell,orion-ehci";
                                reg = <0xa0000 0x1000>;
                        };
                };
 
-               cesa: crypto@90000 {
-                       compatible = "marvell,orion-crypto";
-                       reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
-                             <MBUS_ID(0x09, 0x00) 0x0 0x800>;
-                       reg-names = "regs", "sram";
-                       interrupts = <28>;
-                       status = "okay";
+               crypto_sram: sa-sram {
+                       compatible = "mmio-sram";
+                       reg = <MBUS_ID(0x09, 0x00) 0x0 0x800>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
                };
        };
 };