#define HANDLE_INST(NUM, OPCODE, CLASS) \
case Instruction::OPCODE: visit##OPCODE((CLASS&)I); break;
#include "llvm/Instruction.def"
+#undef HANDLE_INST
}
// Assign the ordering to the freshly created DAG nodes.
getValue(I.getAddress())));
}
+void SelectionDAGBuilder::visitUnreachable(const UnreachableInst &I) {
+ // If the function consists of a single "unreachable" instruction, emit a
+ // "trap". This prevents the back-ends from generating empty functions or
+ // functions which have a prologue, but no epilogue.
+ const BasicBlock *BB = I.getParent();
+ const Function *F = BB->getParent();
+
+ if (F->size() == 1 && BB->size() == 1 &&
+ isa<UnreachableInst>(BB->getTerminator()))
+ DAG.setRoot(DAG.getNode(ISD::TRAP, getCurDebugLoc(),
+ MVT::Other, getRoot()));
+}
+
void SelectionDAGBuilder::visitFSub(const User &I) {
// -0.0 - X --> fneg
const Type *Ty = I.getType();
void visitBr(const BranchInst &I);
void visitSwitch(const SwitchInst &I);
void visitIndirectBr(const IndirectBrInst &I);
- void visitUnreachable(const UnreachableInst &I) { /* noop */ }
+ void visitUnreachable(const UnreachableInst &I);
// Helpers for visitSwitch
bool handleSmallSwitchRange(CaseRec& CR,
-; RUN: llc < %s -march=x86 | grep nop
+; RUN: llc < %s -march=x86 | FileCheck -check-prefix=NO-FP %s
+; RUN: llc < %s -march=x86 -disable-fp-elim | FileCheck -check-prefix=FP %s
target triple = "i686-apple-darwin8"
+define void @func1() noreturn nounwind {
+entry:
+; NO-FP: ud2
+ unreachable
+}
-define void @bork() noreturn nounwind {
+define void @func2() noreturn nounwind {
entry:
+; FP: pushl %ebp
+; FP: movl %esp, %ebp
+; FP: ud2
unreachable
}