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X86 doesn't support sextinreg for 8-bit things either.
author
Chris Lattner
<sabre@nondot.org>
Wed, 7 Dec 2005 17:59:14 +0000
(17:59 +0000)
committer
Chris Lattner
<sabre@nondot.org>
Wed, 7 Dec 2005 17:59:14 +0000
(17:59 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
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diff --git
a/lib/Target/X86/X86ISelLowering.cpp
b/lib/Target/X86/X86ISelLowering.cpp
index b42faa0a09556f5fbcd8e72f8ab206e4d7963d70..7f3aa499bcd89edf735c105f4e923ef8794e915c 100644
(file)
--- a/
lib/Target/X86/X86ISelLowering.cpp
+++ b/
lib/Target/X86/X86ISelLowering.cpp
@@
-88,6
+88,7
@@
X86TargetLowering::X86TargetLowering(TargetMachine &TM)
setOperationAction(ISD::BRTWOWAY_CC , MVT::Other, Expand);
setOperationAction(ISD::MEMMOVE , MVT::Other, Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand);
+ setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand);
setOperationAction(ISD::SEXTLOAD , MVT::i1 , Expand);