git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152173
91177308-0d34-0410-b5e6-
96231b3b80d8
//===----------------------------------------------------------------------===//
//
// This file implements the ScheduleDAG class, which is used as the common
-// base class for instruction schedulers.
+// base class for instruction schedulers. This encapsulates the scheduling DAG,
+// which is shared between SelectionDAG and MachineInstr scheduling.
//
//===----------------------------------------------------------------------===//
/// Live Intervals provides reaching defs in preRA scheduling.
LiveIntervals *LIS;
+ /// After calling BuildSchedGraph, each machine instruction in the current
+ /// scheduling region is mapped to an SUnit.
DenseMap<MachineInstr*, SUnit*> MISUnitMap;
/// UnitLatencies (misnamed) flag avoids computing def-use latencies, using