Move Sched::Preference out of TargetMachine.h where it is not referenced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index cdc4f433f30687778fe4fb59e624290238ad7445..58a3a9cb59143014af4a5461698954995236c738 100644 (file)
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -16,7 +16,7 @@
 #define LLVM_CODEGEN_SCHEDULEDAG_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetLowering.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/GraphTraits.h"

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index e3b2ebbfeeeec002a03ef7ed4048425b0c6407e5..456966b5de1adced7bd4f8ec2fa301169d593fb5 100644 (file)
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -53,6 +53,15 @@ namespace llvm {
   class TargetLoweringObjectFile;
   class Value;
 
+  namespace Sched {
+    enum Preference {
+      None,             // No preference
+      RegPressure,      // Scheduling for lowest register pressure.
+      Hybrid,           // Scheduling for both latency and register pressure.
+      ILP               // Scheduling for ILP in low register pressure mode.
+    };
+  }
+
   // FIXME: should this be here?
   namespace TLSModel {
     enum Model {

diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index c169e063d0a9f4b29d4bdc406ef76e8da0c2d13f..61c60c5c73fbb9321c9717708f34931b2e9b4314 100644 (file)
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -44,15 +44,6 @@ class TargetSubtargetInfo;
 class formatted_raw_ostream;
 class raw_ostream;
 
-namespace Sched {
-  enum Preference {
-    None,             // No preference
-    RegPressure,      // Scheduling for lowest register pressure.
-    Hybrid,           // Scheduling for both latency and register pressure.
-    ILP               // Scheduling for ILP in low register pressure mode.
-  };
-}
-
 //===----------------------------------------------------------------------===//
 ///
 /// TargetMachine - Primary interface to the complete machine description for