Add asmprintergen support for the last X86 instruction that needs it: pcrelative...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 305d72421bf35fc21130ffd71b4a25c1a0fefacc..6f7f642208aebcc681bef81d401ecc0e7c3fb164 100644 (file)
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -115,6 +115,10 @@ namespace {
       }
     }
 
+    void printCallOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT) {
+      printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
+    }
+
     void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
                             MVT::ValueType VT) {
       switch (VT) {
@@ -618,6 +622,9 @@ void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
   if (printInstruction(MI))
     return;   // Printer was automatically generated
 
+  MI->dump();
+  abort();
+
   unsigned Opcode = MI->getOpcode();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetInstrDescriptor &Desc = TII.get(Opcode);

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 420329fa9ae21a122457aadc3e82189b70e21200..7dd4a56f1bc5dbf20a07d63b57c22499abfd977b 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -29,6 +29,10 @@ def f32mem : X86MemOperand<f32>;
 def f64mem : X86MemOperand<f64>;
 def f80mem : X86MemOperand<f80>;
 
+// PCRelative calls need special operand formatting.
+let PrintMethod = "printCallOperand" in
+  def calltarget : Operand<i32>;
+
 // Format specifies the encoding used by the instruction.  This is part of the
 // ad-hoc solution used to emit machine instruction encodings by our machine
 // code emitter.
@@ -196,7 +200,7 @@ def JG  : IBr<0x8F, (ops i32imm:$dst), "jg $dst">, TB;
 let isCall = 1 in
   // All calls clobber the non-callee saved registers...
   let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6] in {
-    def CALLpcrel32 : X86Inst<"call", 0xE8, RawFrm, NoMem, NoImm>;  // FIXME: 'call' doesn't allow 'OFFSET'
+    def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst">;
     def CALL32r     : I<0xFF, MRM2r, (ops R32:$dst), "call $dst">;
     def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst), "call $dst">;
   }