Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU testcases...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102199 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td
index 1c81c5e981ad4ef5c2db2852997bc38ab31ef5be..b8661809858afd69b688828236943a5d5b18a2ba 100644 (file)
--- a/lib/Target/X86/X86InstrMMX.td
+++ b/lib/Target/X86/X86InstrMMX.td
@@ -167,6 +167,9 @@ let neverHasSideEffects = 1 in
 def MMX_MOVQ2FR64rr: SSDIi8<0xD6, MRMSrcReg, (outs FR64:$dst), (ins VR64:$src),
                            "movq2dq\t{$src, $dst|$dst, $src}", []>;
 
+def MMX_MOVFR642Qrr: SSDIi8<0xD6, MRMSrcReg, (outs VR64:$dst), (ins FR64:$src),
+                           "movdq2q\t{$src, $dst|$dst, $src}", []>;
+
 def MMX_MOVNTQmr  : MMXI<0xE7, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src),
                          "movntq\t{$src, $dst|$dst, $src}",
                          [(int_x86_mmx_movnt_dq addr:$dst, VR64:$src)]>;
@@ -569,6 +572,14 @@ def : Pat<(f64 (bitconvert (v4i16 VR64:$src))),
           (MMX_MOVQ2FR64rr VR64:$src)>;
 def : Pat<(f64 (bitconvert (v8i8 VR64:$src))),
           (MMX_MOVQ2FR64rr VR64:$src)>;
+def : Pat<(v1i64 (bitconvert (f64 FR64:$src))),
+          (MMX_MOVFR642Qrr FR64:$src)>;
+def : Pat<(v2i32 (bitconvert (f64 FR64:$src))),
+          (MMX_MOVFR642Qrr FR64:$src)>;
+def : Pat<(v4i16 (bitconvert (f64 FR64:$src))),
+          (MMX_MOVFR642Qrr FR64:$src)>;
+def : Pat<(v8i8 (bitconvert (f64 FR64:$src))),
+          (MMX_MOVFR642Qrr FR64:$src)>;
 
 let AddedComplexity = 20 in {
   def : Pat<(v2i32 (X86vzmovl (bc_v2i32 (load_mmx addr:$src)))),

diff --git a/test/CodeGen/X86/mmx-movdq2q1.ll b/test/CodeGen/X86/mmx-movdq2q1.ll
new file mode 100644 (file)
index 0000000..6340502
--- /dev/null
+++ b/test/CodeGen/X86/mmx-movdq2q1.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+define void @t2(double %a, double %b) nounwind {
+entry:
+        %tmp1 = bitcast double %a to <2 x i32>
+        %tmp2 = bitcast double %b to <2 x i32>
+        %tmp3 = add <2 x i32> %tmp1, %tmp2
+        store <2 x i32> %tmp3, <2 x i32>* null
+        ret void
+}

diff --git a/test/CodeGen/X86/mmx-movdq2q2.ll b/test/CodeGen/X86/mmx-movdq2q2.ll
new file mode 100644 (file)
index 0000000..f12fdb2
--- /dev/null
+++ b/test/CodeGen/X86/mmx-movdq2q2.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+define void @t2(double %a, double %b) nounwind {
+entry:
+        %tmp1 = bitcast double %a to <4 x i16>
+        %tmp2 = bitcast double %b to <4 x i16>
+        %tmp3 = add <4 x i16> %tmp1, %tmp2
+        store <4 x i16> %tmp3, <4 x i16>* null
+        ret void
+}

diff --git a/test/CodeGen/X86/mmx-movdq2q3.ll b/test/CodeGen/X86/mmx-movdq2q3.ll
new file mode 100644 (file)
index 0000000..c3cf00c
--- /dev/null
+++ b/test/CodeGen/X86/mmx-movdq2q3.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+define void @t2(double %a, double %b) nounwind {
+entry:
+        %tmp1 = bitcast double %a to <8 x i8>
+        %tmp2 = bitcast double %b to <8 x i8>
+        %tmp3 = add <8 x i8> %tmp1, %tmp2
+        store <8 x i8> %tmp3, <8 x i8>* null
+        ret void
+}

diff --git a/test/CodeGen/X86/mmx-movdq2q4.ll b/test/CodeGen/X86/mmx-movdq2q4.ll
new file mode 100644 (file)
index 0000000..b23c730
--- /dev/null
+++ b/test/CodeGen/X86/mmx-movdq2q4.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+define void @t2(double %a, double %b) nounwind {
+entry:
+        %tmp1 = bitcast double %a to <1 x i64>
+        %tmp2 = bitcast double %b to <1 x i64>
+        %tmp3 = add <1 x i64> %tmp1, %tmp2
+        store <1 x i64> %tmp3, <1 x i64>* null
+        ret void
+}