of: document new emc-timings subnode in nvidia,tegra124-car
authorTomeu Vizoso <tomeu.vizoso@collabora.com>
Thu, 12 Mar 2015 14:47:56 +0000 (15:47 +0100)
committerThierry Reding <treding@nvidia.com>
Wed, 13 May 2015 13:17:09 +0000 (15:17 +0200)
The EMC clock needs some extra information for changing its rate.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt

index c6620bc9670364315bcc8687ec81c016e7a89719..c3891cece73f0b6458daa768e7a46134b67a4b4a 100644 (file)
@@ -21,10 +21,31 @@ Required properties :
   In clock consumers, this cell represents the bit number in the CAR's
   array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
+The node should contain a "emc-timings" subnode for each supported RAM type (see
+field RAM_CODE in register PMC_STRAPPING_OPT_A).
+
+Required properties for "emc-timings" nodes :
+- nvidia,ram-code : Should contain the value of RAM_CODE this timing set
+  is used for.
+
+Each "emc-timings" node should contain a "timing" subnode for every supported
+EMC clock rate.
+
+Required properties for "timing" nodes :
+- clock-frequency : Should contain the memory clock rate to which this timing
+relates.
+- nvidia,parent-clock-frequency : Should contain the rate at which the current
+parent of the EMC clock should be running at this timing.
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names : Must include the following entries:
+  - emc-parent : the clock that should be the parent of the EMC clock at this
+timing.
+
 Example SoC include file:
 
 / {
-       tegra_car: clock {
+       tegra_car: clock@60006000 {
                compatible = "nvidia,tegra124-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
@@ -62,4 +83,23 @@ Example board file:
        &tegra_car {
                clocks = <&clk_32k> <&osc>;
        };
+
+       clock@60006000 {
+               emc-timings-3 {
+                       nvidia,ram-code = <3>;
+
+                       timing-12750000 {
+                               clock-frequency = <12750000>;
+                               nvidia,parent-clock-frequency = <408000000>;
+                               clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
+                               clock-names = "emc-parent";
+                       };
+                       timing-20400000 {
+                               clock-frequency = <20400000>;
+                               nvidia,parent-clock-frequency = <408000000>;
+                               clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
+                               clock-names = "emc-parent";
+                       };
+               };
+       };
 };