drm/radeon: use inline functions to calc sa_bo addr
authorChristian König <deathsimple@vodafone.de>
Wed, 9 May 2012 13:34:49 +0000 (15:34 +0200)
committerDave Airlie <airlied@redhat.com>
Wed, 9 May 2012 16:22:31 +0000 (17:22 +0100)
Instead of hacking the calculation multiple times.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_gart.c
drivers/gpu/drm/radeon/radeon_object.h
drivers/gpu/drm/radeon/radeon_ring.c
drivers/gpu/drm/radeon/radeon_semaphore.c

index c58a036233fb4409b3b4b656a1aba1c103b1b40a..4a5d9d4ef7ee1940fdd558cc12bdf2fb9d7a89e2 100644 (file)
@@ -404,10 +404,8 @@ retry:
                radeon_vm_unbind(rdev, vm_evict);
                goto retry;
        }
-       vm->pt = rdev->vm_manager.sa_manager.cpu_ptr;
-       vm->pt += (vm->sa_bo.offset >> 3);
-       vm->pt_gpu_addr = rdev->vm_manager.sa_manager.gpu_addr;
-       vm->pt_gpu_addr += vm->sa_bo.offset;
+       vm->pt = radeon_sa_bo_cpu_addr(&vm->sa_bo);
+       vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(&vm->sa_bo);
        memset(vm->pt, 0, RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8));
 
 retry_id:
index f9104be88d7c12e48ec92254109ec6991b9e725e..c120ab9e457bd4044a1ca7670f0a42af04c08141 100644 (file)
@@ -146,6 +146,17 @@ extern struct radeon_bo_va *radeon_bo_va(struct radeon_bo *rbo,
 /*
  * sub allocation
  */
+
+static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
+{
+       return sa_bo->manager->gpu_addr + sa_bo->offset;
+}
+
+static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
+{
+       return sa_bo->manager->cpu_ptr + sa_bo->offset;
+}
+
 extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
                                     struct radeon_sa_manager *sa_manager,
                                     unsigned size, u32 domain);
index 2fdc8c35f87c33d535e698d2d79d5cbd23174d00..116be5e83141bb627f7fe887891e5074d834ef64 100644 (file)
@@ -127,10 +127,8 @@ retry:
                                             size, 256);
                        if (!r) {
                                *ib = &rdev->ib_pool.ibs[idx];
-                               (*ib)->ptr = rdev->ib_pool.sa_manager.cpu_ptr;
-                               (*ib)->ptr += ((*ib)->sa_bo.offset >> 2);
-                               (*ib)->gpu_addr = rdev->ib_pool.sa_manager.gpu_addr;
-                               (*ib)->gpu_addr += (*ib)->sa_bo.offset;
+                               (*ib)->ptr = radeon_sa_bo_cpu_addr(&(*ib)->sa_bo);
+                               (*ib)->gpu_addr = radeon_sa_bo_gpu_addr(&(*ib)->sa_bo);
                                (*ib)->fence = fence;
                                (*ib)->vm_id = 0;
                                (*ib)->is_const_ib = false;
index c5b3d8ecece9cc57fe57baeaa7ae3cdf7fc26977..f312ba59bbe954550fd54b048cde55bbfe05eabd 100644 (file)
@@ -53,10 +53,8 @@ static int radeon_semaphore_add_bo(struct radeon_device *rdev)
                kfree(bo);
                return r;
        }
-       gpu_addr = rdev->ib_pool.sa_manager.gpu_addr;
-       gpu_addr += bo->ib->sa_bo.offset;
-       cpu_ptr = rdev->ib_pool.sa_manager.cpu_ptr;
-       cpu_ptr += (bo->ib->sa_bo.offset >> 2);
+       gpu_addr = radeon_sa_bo_gpu_addr(&bo->ib->sa_bo);
+       cpu_ptr = radeon_sa_bo_cpu_addr(&bo->ib->sa_bo);
        for (i = 0; i < (RADEON_SEMAPHORE_BO_SIZE/8); i++) {
                bo->semaphores[i].gpu_addr = gpu_addr;
                bo->semaphores[i].cpu_ptr = cpu_ptr;