TmpInst.addOperand(MCOp);
}
- if (TmpInst.getOpcode() == X86::LEA64_32r) {
- // Should handle the 'subreg rewriting' for the lea64_32mem operand.
+ switch (TmpInst.getOpcode()) {
+ case X86::LEA64_32r:
+ // Handle the 'subreg rewriting' for the lea64_32mem operand.
lower_lea64_32mem(&TmpInst, 1);
+ break;
+ case X86::CALL64pcrel32:
+ case X86::CALLpcrel32:
+ case X86::TAILJMPd:
+ // The target operand is pc-relative, not an absolute reference.
+ // FIXME: this should be an operand property, not an asm format modifier.
+ ;
}
// FIXME: Convert TmpInst.
}
void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
- const char *Modifier = 0;
bool NotRIPRel = false;
const MCOperand &BaseReg = MI->getOperand(Op);
}
if (IndexReg.getReg() || BaseReg.getReg()) {
- unsigned ScaleVal = MI->getOperand(Op+1).getImm();
- unsigned BaseRegOperand = 0, IndexRegOperand = 2;
-
// There are cases where we can end up with ESP/RSP in the indexreg slot.
// If this happens, swap the base/index register to support assemblers that
// don't work when the index is *SP.
// FIXME: REMOVE THIS.
- if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
- assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
- abort();
- //std::swap(BaseReg, IndexReg);
- //std::swap(BaseRegOperand, IndexRegOperand);
- }
+ assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
O << '(';
if (BaseReg.getReg())
- printOperand(MI, Op+BaseRegOperand, Modifier);
+ printOperand(MI, Op);
if (IndexReg.getReg()) {
O << ',';
- printOperand(MI, Op+IndexRegOperand, Modifier);
- if (ScaleVal != 1)
+ printOperand(MI, Op+2);
+ if (MI->getOperand(Op+1).getImm() != 1)
O << ',' << ScaleVal;
}
O << ')';