Add new files

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5259 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h
new file mode 100644 (file)
index 0000000..ac4a222
--- /dev/null
+++ b/include/llvm/CodeGen/LiveVariables.h
@@ -0,0 +1,131 @@
+//===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
+// 
+// This class computes live variables using are sparse implementation based on
+// the machine code SSA form.  This class computes live variable information for
+// each virtual and physical register in a function.  It uses the dominance
+// properties of SSA form to efficiently compute live variables for virtual
+// registers, and assumes that physical registers are only live within a single
+// basic block (allowing it to do a single local analysis to resolve physical
+// register lifetimes in each basic block).
+//   
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_LIVEVARIABLES_H
+#define LLVM_CODEGEN_LIVEVARIABLES_H
+
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include <map>
+
+class MRegisterInfo;
+
+class LiveVariables : public MachineFunctionPass {
+  struct VarInfo {
+    /// DefBlock - The basic block which defines this value...
+    MachineBasicBlock *DefBlock;
+    MachineInstr      *DefInst;
+
+    /// AliveBlocks - Set of blocks of which this value is alive completely
+    /// through.  This is a bit set which uses the basic block number as an
+    /// index.
+    ///
+    std::vector<bool> AliveBlocks;
+
+    /// Kills - List of MachineBasicblock's which contain the last use of this
+    /// virtual register (kill it).  This also includes the specific instruction
+    /// which kills the value.
+    ///
+    std::vector<std::pair<MachineBasicBlock*, MachineInstr*> > Kills;
+
+    VarInfo() : DefBlock(0), DefInst(0) {}
+  };
+
+  /// VirtRegInfo - This list is a mapping from virtual register number to
+  /// variable information.  FirstVirtualRegister is subtracted from the virtual
+  /// register number before indexing into this list.
+  ///
+  std::vector<VarInfo> VirtRegInfo;
+
+  /// RegistersKilled - This multimap keeps track of all of the registers that
+  /// are dead immediately after an instruction reads its operands.  If an
+  /// instruction does not have an entry in this map, it kills no registers.
+  ///
+  std::multimap<MachineInstr*, unsigned> RegistersKilled;
+
+  /// RegistersDead - This multimap keeps track of all of the registers that are
+  /// dead immediately after an instruction executes, which are not dead after
+  /// the operands are evaluated.  In practice, this only contains registers
+  /// which are defined by an instruction, but never used.
+  ///
+  std::multimap<MachineInstr*, unsigned> RegistersDead;
+
+private:   // Intermediate data structures
+
+  /// BBMap - Maps LLVM basic blocks to their corresponding machine basic block.
+  /// This also provides a numbering of the basic blocks in the function.
+  std::map<const BasicBlock*, std::pair<MachineBasicBlock*, unsigned> > BBMap;
+  
+  const MRegisterInfo *RegInfo;
+
+  MachineInstr **PhysRegInfo;
+  bool          *PhysRegUsed;
+
+public:
+
+  virtual bool runOnMachineFunction(MachineFunction &MF);
+
+  /// killed_iterator - Iterate over registers killed by a machine instruction
+  ///
+  typedef std::multimap<MachineInstr*,
+                       unsigned>::const_iterator killed_iterator;
+  
+  /// killed_begin/end - Get access to the range of registers killed by a
+  /// machine instruction.
+  killed_iterator killed_begin(MachineInstr *MI) const {
+    return RegistersKilled.lower_bound(MI);
+  }
+  killed_iterator killed_end(MachineInstr *MI) const {
+    return RegistersKilled.upper_bound(MI);
+  }
+
+  killed_iterator dead_begin(MachineInstr *MI) const {
+    return RegistersDead.lower_bound(MI);
+  }
+  killed_iterator dead_end(MachineInstr *MI) const {
+    return RegistersDead.upper_bound(MI);
+  }
+
+  /// addVirtualRegisterKill - Add information about the fact that the specified
+  /// register is dead after being used by the specified instruction.
+  ///
+  void addVirtualRegisterKill(unsigned IncomingReg, MachineInstr *MI) {
+    RegistersDead.insert(std::make_pair(MI, IncomingReg));
+  }
+
+  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+    AU.setPreservesAll();
+  }
+
+  virtual void releaseMemory() {
+    VirtRegInfo.clear();
+    RegistersKilled.clear();
+    RegistersDead.clear();
+  }
+private:
+  VarInfo &getVarInfo(unsigned RegIdx) {
+    if (RegIdx >= VirtRegInfo.size()) {
+      if (RegIdx >= 2*VirtRegInfo.size())
+       VirtRegInfo.resize(RegIdx*2);
+      else
+       VirtRegInfo.resize(2*VirtRegInfo.size());
+    }
+    return VirtRegInfo[RegIdx];
+  }
+
+  void MarkVirtRegAliveInBlock(VarInfo &VRInfo, const BasicBlock *BB);
+  void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
+                               MachineInstr *MI);
+  void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
+  void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
+};
+
+#endif

diff --git a/include/llvm/CodeGen/MachineConstantPool.h b/include/llvm/CodeGen/MachineConstantPool.h
new file mode 100644 (file)
index 0000000..06394ff
--- /dev/null
+++ b/include/llvm/CodeGen/MachineConstantPool.h
@@ -0,0 +1,45 @@
+//===-- CodeGen/MachineConstantPool.h - Abstract Constant Pool --*- C++ -*-===//
+// 
+// The MachineConstantPool class keeps track of constants referenced by a
+// function which must be spilled to memory.  This is used for constants which
+// are unable to be used directly as operands to instructions, which typically
+// include floating point and large integer constants.
+//
+// Instructions reference the address of these constant pool constants through
+// the use of MO_ConstantPoolIndex values.  When emitting assembly or machine
+// code, these virtual address references are converted to refer to the
+// address of the function constant pool values.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_MACHINECONSTANTPOOL_H
+#define LLVM_CODEGEN_MACHINECONSTANTPOOL_H
+
+#include <vector>
+class Constant;
+
+class MachineConstantPool {
+  std::vector<Constant*> Constants;
+public:
+
+  /// getConstantPoolIndex - Create a new entry in the constant pool or return
+  /// an existing one.  This should eventually allow sharing of duplicate
+  /// objects in the constant pool, but this is adequate for now.
+  ///
+  unsigned getConstantPoolIndex(Constant *C) {
+    Constants.push_back(C);
+    return Constants.size()-1;
+  }
+
+  const std::vector<Constant*> &getConstants() const { return Constants; }
+
+  /// print - Used by the MachineFunction printer to print information about
+  /// stack objects.  Implemented in MachineFunction.cpp
+  ///
+  void print(std::ostream &OS) const;
+
+  /// dump - Call print(std::cerr) to be called from the debugger.
+  void dump() const;
+};
+
+#endif

diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
new file mode 100644 (file)
index 0000000..9057fd0
--- /dev/null
+++ b/include/llvm/CodeGen/Passes.h
@@ -0,0 +1,38 @@
+//===-- Passes.h - Target independant code generation passes ----*- C++ -*-===//
+//
+// This file defines interfaces to access the target independant code generation
+// passes provided by the LLVM backend.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_PASSES_H
+#define LLVM_CODEGEN_PASSES_H
+
+class Pass;
+class PassInfo;
+
+// PHIElimination pass - This pass eliminates machine instruction PHI nodes by
+// inserting copy instructions.  This destroys SSA information, but is the
+// desired input for some register allocators.  This pass is "required" by these
+// register allocator like this:  AU.addRequiredID(PHIEliminationID);
+//
+extern const PassInfo *PHIEliminationID;
+
+/// SimpleRegisterAllocation Pass - This pass converts the input machine code
+/// from SSA form to use explicit registers by spilling every register.  Wow,
+/// great policy huh?
+///
+Pass *createSimpleRegisterAllocator();
+
+/// LocalRegisterAllocation Pass - This pass register allocates the input code a
+/// basic block at a time, yielding code better than the simple register
+/// allocator, but not as good as a global allocator.
+/// 
+Pass *createLocalRegisterAllocator();
+
+/// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
+/// and eliminates abstract frame references.
+///
+Pass *createPrologEpilogCodeInserter();
+
+#endif