arm64: KVM: fix 64bit CP15 VM access for 32bit guests
authorMarc Zyngier <marc.zyngier@arm.com>
Fri, 1 Aug 2014 11:00:36 +0000 (12:00 +0100)
committerChristoffer Dall <christoffer.dall@linaro.org>
Thu, 2 Oct 2014 15:19:07 +0000 (17:19 +0200)
Commit f0a3eaff71b8 (ARM64: KVM: fix big endian issue in
access_vm_reg for 32bit guest) changed the way we handle CP15
VM accesses, so that all 64bit accesses are done via vcpu_sys_reg.

This looks like a good idea as it solves indianness issues in an
elegant way, except for one small detail: the register index is
doesn't refer to the same array! We end up corrupting some random
data structure instead.

Fix this by reverting to the original code, except for the introduction
of a vcpu_cp15_64_high macro that deals with the endianness thing.

Tested on Juno with 32bit SMP guests.

Cc: Victor Kamensky <victor.kamensky@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
(cherry picked from commit dedf97e8ff2c7513b1370e36b56e08b6bd0f0290)
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
arch/arm64/include/asm/kvm_host.h
arch/arm64/kvm/sys_regs.c

index 79812be4f25fe053c8eb61b8ba18d3efb9473320..e10c45a578e36278f147f0eda678587f8e285b01 100644 (file)
@@ -149,9 +149,11 @@ struct kvm_vcpu_arch {
 #define vcpu_cp15(v,r)         ((v)->arch.ctxt.copro[(r)])
 
 #ifdef CONFIG_CPU_BIG_ENDIAN
-#define vcpu_cp15_64_low(v,r) ((v)->arch.ctxt.copro[((r) + 1)])
+#define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r))
+#define vcpu_cp15_64_low(v,r)  vcpu_cp15((v),(r) + 1)
 #else
-#define vcpu_cp15_64_low(v,r) ((v)->arch.ctxt.copro[((r) + 0)])
+#define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r) + 1)
+#define vcpu_cp15_64_low(v,r)  vcpu_cp15((v),(r))
 #endif
 
 struct kvm_vm_stat {
index a4fd5267c65b4565db177eac4d0143805f84eb30..5805e7c4a4ddf573603167c91244cf01d46813b1 100644 (file)
@@ -135,10 +135,13 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu,
        BUG_ON(!p->is_write);
 
        val = *vcpu_reg(vcpu, p->Rt);
-       if (!p->is_aarch32 || !p->is_32bit)
+       if (!p->is_aarch32) {
                vcpu_sys_reg(vcpu, r->reg) = val;
-       else
+       } else {
+               if (!p->is_32bit)
+                       vcpu_cp15_64_high(vcpu, r->reg) = val >> 32;
                vcpu_cp15_64_low(vcpu, r->reg) = val & 0xffffffffUL;
+       }
 
        return true;
 }