Merge tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel...

SoCFPGA updates for v4.2 part 3
- Add SCU node for Arria 10
- Add enable-method for cpu nodes
- Add SDRAM controller binding doc
- Enable gpio-leds on SoCFPGA Socrates board

* tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: socrates: add gpio-leds
  ARM: socfpga: socrates: enable gpio0/1
  ARM: socfpga: dts: add sdram controller dt binding doc
  ARM: socfpga: dts: add enable-method property for cpu nodes
  ARM: socfpga: dts: add the a9-scu node for arria10

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt
new file mode 100644 (file)
index 0000000..77ca635
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt
@@ -0,0 +1,12 @@
+Altera SOCFPGA SDRAM Controller
+
+Required properties:
+- compatible : Should contain "altr,sdr-ctl" and "syscon".
+  syscon is required by the Altera SOCFPGA SDRAM EDAC.
+- reg : Should contain 1 register range (address and length)
+
+Example:
+       sdr: sdr@ffc25000 {
+               compatible = "altr,sdr-ctl", "syscon";
+               reg = <0xffc25000 0x1000>;
+       };

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 9b653edd003fbfb7dbfb5bc623b3cc44cf95e47d..80f924deed37457409fff03e7924894ead9e4601 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -36,6 +36,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "altr,socfpga-smp";
 
                cpu@0 {
                        compatible = "arm,cortex-a9";

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index abf97630c5928b0d88a67539a93a860da60abe3c..6ceb26e542ec11f2d3815ed907bf5d1ae2c71790 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -24,6 +24,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "altr,socfpga-a10-smp";
 
                cpu@0 {
                        compatible = "arm,cortex-a9";
@@ -567,6 +568,11 @@
                        reg = <0xffd05000 0x100>;
                };
 
+               scu: snoop-control-unit@ffffc000 {
+                       compatible = "arm,cortex-a9-scu";
+                       reg = <0xffffc000 0x100>;
+               };
+
                sysmgr: sysmgr@ffd06000 {
                        compatible = "altr,sys-mgr", "syscon";
                        reg = <0xffd06000 0x300>;

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
index a1814b4574509e10026b2702125cd9b3c9edbb17..019dd2fea208c300baf698052d8c5e24a63b0298 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -30,12 +30,23 @@
                device_type = "memory";
                reg = <0x0 0x40000000>; /* 1GB */
        };
+
+       leds: gpio-leds {
+       };
 };
 
 &gmac1 {
        status = "okay";
 };
 
+&gpio0 {
+       status = "okay";
+};
+
+&gpio1 {
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 
@@ -45,6 +56,26 @@
        };
 };
 
+&leds {
+       compatible = "gpio-leds";
+
+       led@0 {
+               label = "led:green:heartbeat";
+               gpios = <&porta 28 1>;
+               linux,default-trigger = "heartbeat";
+       };
+
+       led@1 {
+               label = "led:green:D7";
+               gpios = <&portb 19 1>;
+       };
+
+       led@2 {
+               label = "led:green:D8";
+               gpios = <&portb 25 1>;
+       };
+};
+
 &mmc {
        status = "okay";
 };