Generate code for llvm.uadd.with.overflow intrinsic. No conversion support yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59786 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 4bc0128bd571b9fca801d6eb710c87fc4fd21d70..53bc88d0c3f7e657503aa62c9ffd84fe5881bd1c 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4109,7 +4109,18 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
     return 0;
   }
   case Intrinsic::uadd_with_overflow: {
-    // TODO: Convert to "ISD::UADDO" instruction.
+    // Convert to "ISD::UADDO" instruction.
+    SDValue Op1 = getValue(I.getOperand(1));
+    SDValue Op2 = getValue(I.getOperand(2));
+    MVT Ty = Op1.getValueType();
+
+    MVT ValueVTs[] = { Ty, MVT::i1 };
+    SDValue Ops[] = { Op1, Op2 };
+
+    SDValue Result = DAG.getNode(ISD::UADDO, DAG.getVTList(&ValueVTs[0], 2),
+                                 &Ops[0], 2);
+
+    setValue(&I, Result);
     return 0;
   }