// Process all explicit uses...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isUse() && MO.isRegister() && MO.getReg()) {
+ if (MO.isRegister() && MO.isUse() && MO.getReg()) {
if (MRegisterInfo::isVirtualRegister(MO.getReg())){
HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
// Process all explicit defs...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isDef() && MO.isRegister() && MO.getReg()) {
+ if (MO.isRegister() && MO.isDef() && MO.getReg()) {
if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
VarInfo &VRInfo = getVarInfo(MO.getReg());
unsigned StartOp = 0;
// Specialize printing if op#0 is definition
- if (getNumOperands() && getOperand(0).isDef() && !getOperand(0).isUse()) {
+ if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
::print(getOperand(0), OS, TM);
OS << " = ";
++StartOp; // Don't print this operand again!
OS << " ";
::print(mop, OS, TM);
- if (mop.isDef())
- if (mop.isUse())
- OS << "<def&use>";
- else
- OS << "<def>";
+ if (mop.isReg() && mop.isDef())
+ OS << "<def>";
}
OS << "\n";
for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
os << "\t" << MI.getOperand(i);
- if (MI.getOperand(i).isDef())
- if (MI.getOperand(i).isUse())
- os << "<d&u>";
- else
- os << "<d>";
+ if (MI.getOperand(i).isReg() && MI.getOperand(i).isDef())
+ os << "<d>";
}
return os << "\n";