Fill in the default predication bits for ARM unconditional branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118907 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index b8948322c20751c358f4305d568c60831a8ca61b..d2ac149928c42a72371bc3d447e016ee1232d9cf 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1381,6 +1381,7 @@ let isBranch = 1, isTerminator = 1 in {
     def B : ABXI<0b1010, (outs), (ins brtarget:$target), IIC_Br,
                 "b\t$target", [(br bb:$target)]> {
       bits<24> target;
+      let Inst{31-28} = 0b1110;
       let Inst{23-0} = target;
     }