Add a hook to find out how the target handles shift amounts that are out of

range.  Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).

This defaults to undefined, which is conservatively correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19677 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index dd8c084a597945899923f5c5bc8ddc77f2e34516..206a80657490c1345feef12e2abbcd9082fa2e07 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -25,6 +25,7 @@ TargetLowering::TargetLowering(TargetMachine &tm)
 
   IsLittleEndian = TD.isLittleEndian();
   ShiftAmountTy = SetCCResultTy = PointerTy = getValueType(TD.getIntPtrType());
+  ShiftAmtHandling = Undefined;
   memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*));
 }