unsigned Reg = MO.getReg();
if (Modifier && strncmp(Modifier, "subreg", 6) == 0) {
if (strncmp(Modifier + 7, "even", 4) == 0)
- Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_EVEN);
+ Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::subreg_even32);
else if (strncmp(Modifier + 7, "odd", 3) == 0)
- Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::SUBREG_ODD);
+ Reg = TM.getRegisterInfo()->getSubReg(Reg, SystemZ::subreg_odd32);
else
assert(0 && "Invalid subreg modifier");
}
-//===- SystemZRegisterInfo.h - SystemZ Register Information Impl ----*- C++ -*-===//
+//===-- SystemZRegisterInfo.h - SystemZ Register Information ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
namespace llvm {
-namespace SystemZ {
- /// SubregIndex - The index of various sized subregister classes. Note that
- /// these indices must be kept in sync with the class indices in the
- /// SystemZRegisterInfo.td file.
- enum SubregIndex {
- SUBREG_32BIT = 1, SUBREG_EVEN = 1, SUBREG_ODD = 2
- };
-}
-
class SystemZSubtarget;
class SystemZInstrInfo;
class Type;
// Status register
def PSW : SystemZReg<"psw">;
-def subreg_32bit : PatLeaf<(i32 1)>;
-def subreg_even32 : PatLeaf<(i32 1)>;
-def subreg_odd32 : PatLeaf<(i32 2)>;
-def subreg_even : PatLeaf<(i32 3)>;
-def subreg_odd : PatLeaf<(i32 4)>;
+let Namespace = "SystemZ" in {
+def subreg_32bit : SubRegIndex { let NumberHack = 1; }
+def subreg_even32 : SubRegIndex { let NumberHack = 1; }
+def subreg_odd32 : SubRegIndex { let NumberHack = 2; }
+def subreg_even : SubRegIndex { let NumberHack = 3; }
+def subreg_odd : SubRegIndex { let NumberHack = 4; }
+}
def : SubRegSet<1, [R0D, R1D, R2D, R3D, R4D, R5D, R6D, R7D,
R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D],