ARM64: dts: rk3399: add pinctrl for uart
authorDavid Wu <david.wu@rock-chips.com>
Wed, 16 Mar 2016 19:41:00 +0000 (03:41 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 18 Mar 2016 02:26:03 +0000 (10:26 +0800)
Change-Id: I8c48826d789bb48f234aa82014754dd519888d07
Signed-off-by: David Wu <david.wu@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 9f93d3f0458eb1c544e5ed1b0519c894d4e249a9..73229c2ee708d1cdefaf1aa6f4306c4118c46bb5 100644 (file)
@@ -68,6 +68,7 @@
                serial1 = &uart1;
                serial2 = &uart2;
                serial3 = &uart3;
+               serial4 = &uart4;
        };
 
        psci {
                interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
                status = "disabled";
        };
 
                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart1_xfer>;
                status = "disabled";
        };
 
                interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart2c_xfer>;
                status = "disabled";
        };
 
                interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>;
                status = "disabled";
        };
 
                interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;
                reg-io-width = <4>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&uart4_xfer>;
                status = "disabled";
        };