drm/nouveau/mc: abstract interface to master intr registers
authorBen Skeggs <bskeggs@redhat.com>
Thu, 20 Aug 2015 04:54:22 +0000 (14:54 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 28 Aug 2015 02:40:48 +0000 (12:40 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
13 files changed:
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g94.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv40.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv4c.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

index bafafa643e7f82ae2fa2191e36065b72697ee3c4..1fbbdaad7fcd92234ead67846c6923000244d732 100644 (file)
@@ -10,6 +10,9 @@ struct nvkm_mc {
        bool use_msi;
 };
 
+void nvkm_mc_intr_unarm(struct nvkm_mc *);
+void nvkm_mc_intr_rearm(struct nvkm_mc *);
+u32 nvkm_mc_intr_mask(struct nvkm_mc *);
 void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
 
 int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
index 8d0f5aca3d539d4a6d7c1b3c2f7b91d817874f7a..6a8d56c7201eabfcb61dc61ccb6b4ef9c5cdc0fa 100644 (file)
@@ -32,13 +32,24 @@ nvkm_mc_unk260(struct nvkm_mc *mc, u32 data)
                mc->func->unk260(mc, data);
 }
 
-static inline u32
+void
+nvkm_mc_intr_unarm(struct nvkm_mc *mc)
+{
+       return mc->func->intr_unarm(mc);
+}
+
+void
+nvkm_mc_intr_rearm(struct nvkm_mc *mc)
+{
+       return mc->func->intr_rearm(mc);
+}
+
+u32
 nvkm_mc_intr_mask(struct nvkm_mc *mc)
 {
-       struct nvkm_device *device = mc->subdev.device;
-       u32 intr = nvkm_rd32(device, 0x000100);
-       if (intr == 0xffffffff) /* likely fallen off the bus */
-               intr = 0x00000000;
+       u32 intr = mc->func->intr_mask(mc);
+       if (WARN_ON_ONCE(intr == 0xffffffff))
+               intr = 0; /* likely fallen off the bus */
        return intr;
 }
 
@@ -52,8 +63,7 @@ nvkm_mc_intr(int irq, void *arg)
        struct nvkm_subdev *unit;
        u32 intr;
 
-       nvkm_wr32(device, 0x000140, 0x00000000);
-       nvkm_rd32(device, 0x000140);
+       nvkm_mc_intr_unarm(mc);
        intr = nvkm_mc_intr_mask(mc);
        if (mc->use_msi)
                mc->func->msi_rearm(mc);
@@ -74,14 +84,15 @@ nvkm_mc_intr(int irq, void *arg)
                        nvkm_error(subdev, "unknown intr %08x\n", stat);
        }
 
-       nvkm_wr32(device, 0x000140, 0x00000001);
+       nvkm_mc_intr_rearm(mc);
        return intr ? IRQ_HANDLED : IRQ_NONE;
 }
 
 static int
 nvkm_mc_fini(struct nvkm_subdev *subdev, bool suspend)
 {
-       nvkm_wr32(subdev->device, 0x000140, 0x00000000);
+       struct nvkm_mc *mc = nvkm_mc(subdev);
+       nvkm_mc_intr_unarm(mc);
        return 0;
 }
 
@@ -96,10 +107,9 @@ static int
 nvkm_mc_init(struct nvkm_subdev *subdev)
 {
        struct nvkm_mc *mc = nvkm_mc(subdev);
-       struct nvkm_device *device = mc->subdev.device;
        if (mc->func->init)
                mc->func->init(mc);
-       nvkm_wr32(device, 0x000140, 0x00000001);
+       nvkm_mc_intr_rearm(mc);
        return 0;
 }
 
index 36720f25f952d26c9d908a3041555f4aa37876b6..7d6a87f22b42e4f99595833339360f7f9d0c96cb 100644 (file)
@@ -27,6 +27,9 @@ static const struct nvkm_mc_func
 g94_mc = {
        .init = nv50_mc_init,
        .intr = nv50_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index 2936fabb7cf18b478b8f2151f76403374278149e..3eec7251b4d3ff45ab25200393d200d4424f6dbe 100644 (file)
@@ -48,6 +48,9 @@ static const struct nvkm_mc_func
 g98_mc = {
        .init = nv50_mc_init,
        .intr = g98_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index 6e7af483ccf3c99c30e0696fd4216db60316ac8b..5ad00809d66fb7fdc379c626844c1766306aa177 100644 (file)
@@ -64,6 +64,9 @@ static const struct nvkm_mc_func
 gf100_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = gf100_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };
index 3515cff5ae48ac40d78ddccc87b28e3b74237a07..435f788b78bd038276893224c2994b4308e73786 100644 (file)
@@ -27,6 +27,9 @@ static const struct nvkm_mc_func
 gf106_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };
index aa812fe1975095cedbd130c75598ddffb1a69366..9a8b5662020749ce167b49404dfd634061d9db4a 100644 (file)
@@ -27,6 +27,9 @@ static const struct nvkm_mc_func
 gk20a_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index 09dc2ebae7bc715610d28a650c14ae2f1629b223..d282ec1555f864742b941cc661e1002615bbf17e 100644 (file)
@@ -38,6 +38,27 @@ nv04_mc_intr[] = {
        {}
 };
 
+void
+nv04_mc_intr_unarm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000000);
+       nvkm_rd32(device, 0x000140);
+}
+
+void
+nv04_mc_intr_rearm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000001);
+}
+
+u32
+nv04_mc_intr_mask(struct nvkm_mc *mc)
+{
+       return nvkm_rd32(mc->subdev.device, 0x000100);
+}
+
 void
 nv04_mc_init(struct nvkm_mc *mc)
 {
@@ -50,6 +71,9 @@ static const struct nvkm_mc_func
 nv04_mc = {
        .init = nv04_mc_init,
        .intr = nv04_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
 };
 
 int
index 1e75445f84de8898bfe77ad6276f435e32757fe1..80912e7d1dec6eebee475428448bd2a8ba39c593 100644 (file)
@@ -33,6 +33,9 @@ static const struct nvkm_mc_func
 nv40_mc = {
        .init = nv04_mc_init,
        .intr = nv04_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index e6795d1aa60dac8c4fd28a97a27c9422163cef91..79958c13a5f827b30d1c2af729c90c6aeeeeaaf9 100644 (file)
@@ -41,6 +41,9 @@ static const struct nvkm_mc_func
 nv44_mc = {
        .init = nv44_mc_init,
        .intr = nv04_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index 61ab2547af85defbefe382fdd447030a1ce59095..68a4a04777215ebe5e653c3030d238cb447ab4c9 100644 (file)
@@ -27,6 +27,9 @@ static const struct nvkm_mc_func
 nv4c_mc = {
        .init = nv44_mc_init,
        .intr = nv04_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
 };
 
 int
index 071789927615aa8e28c2a19d075cb5b58f03405c..325a18232030b17759326783e11fe976d4b05f5d 100644 (file)
@@ -59,6 +59,9 @@ static const struct nvkm_mc_func
 nv50_mc = {
        .init = nv50_mc_init,
        .intr = nv50_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
        .msi_rearm = nv50_mc_msi_rearm,
 };
 
index ca2249b189980ff0eefecc17b04d83bc2dc1e44b..5f9407281b6fd1322b8ec79572e0a4be985d6973 100644 (file)
@@ -14,12 +14,21 @@ struct nvkm_mc_intr {
 struct nvkm_mc_func {
        void (*init)(struct nvkm_mc *);
        const struct nvkm_mc_intr *intr;
+       /* disable reporting of interrupts to host */
+       void (*intr_unarm)(struct nvkm_mc *);
+       /* enable reporting of interrupts to host */
+       void (*intr_rearm)(struct nvkm_mc *);
+       /* retrieve pending interrupt mask (NV_PMC_INTR) */
+       u32 (*intr_mask)(struct nvkm_mc *);
        void (*msi_rearm)(struct nvkm_mc *);
        void (*unk260)(struct nvkm_mc *, u32);
 };
 
 void nv04_mc_init(struct nvkm_mc *);
 extern const struct nvkm_mc_intr nv04_mc_intr[];
+void nv04_mc_intr_unarm(struct nvkm_mc *);
+void nv04_mc_intr_rearm(struct nvkm_mc *);
+u32 nv04_mc_intr_mask(struct nvkm_mc *);
 
 void nv40_mc_msi_rearm(struct nvkm_mc *);