generate the fun in-register fp<->long instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244
91177308-0d34-0410-b5e6-
96231b3b80d8
PowerPCSubTypeKV, PowerPCSubTypeKVSize,
PowerPCFeatureKV, PowerPCFeatureKVSize);
IsGigaProcessor = (Bits & PowerPCFeatureGPUL ) != 0;
+ Is64Bit = (Bits & PowerPCFeature64Bit) != 0;
HasFSQRT = (Bits & PowerPCFeatureFSqrt) != 0;
// Set the boolean corresponding to the current target triple, or the default
/// Used by the ISel to turn in optimizations for POWER4-derived architectures
bool IsGigaProcessor;
+ bool Is64Bit;
bool HasFSQRT;
bool IsAIX;
bool IsDarwin;
bool isAIX() const { return IsAIX; }
bool isDarwin() const { return IsDarwin; }
-
+ bool is64Bit() const { return Is64Bit; }
bool isGigaProcessor() const { return IsGigaProcessor; }
};
} // End llvm namespace