arm64: dts: rockchip: rk3399-android: isp config add dsi control

Change-Id: I39b3a7a7b03d2255342599d4d8b5482c4f8ac5dc
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index 9dec42dad55ed3b447fd18617bc7a75afd1594d3..b5b3a31b758f690d1e5420cc4f949240f4b934e1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -327,7 +327,7 @@
                pinctrl-0 = <&cif_clkout>;
                pinctrl-1 = <&isp_dvp_d0d7>;
                pinctrl-2 = <&cif_clkout>;
-               pinctrl-3 = <&cif_clkout &isp_prelight>;
+               pinctrl-3 = <&isp_prelight>;
                pinctrl-4 = <&isp_flash_trigger_as_gpio>;
                pinctrl-5 = <&isp_flash_trigger>;
                rockchip,isp,mipiphy = <2>;
@@ -360,22 +360,24 @@
                        <&cru SCLK_ISP1>, <&cru SCLK_CIF_OUT>,
                        <&cru SCLK_CIF_OUT>, <&cru SCLK_DPHY_TX1RX1_CFG>,
                        <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_ISP1_WRAPPER>,
-                       <&cru SCLK_DPHY_RX0_CFG>;
+                       <&cru SCLK_DPHY_RX0_CFG>, <&cru PCLK_MIPI_DSI1>,
+                       <&cru SCLK_MIPIDPHY_CFG>;
                clock-names =
                        "aclk_isp1_noc", "aclk_isp1_wrapper",
                        "hclk_isp1_noc", "hclk_isp1_wrapper",
                        "clk_isp1", "clk_cif_out",
                        "clk_cif_pll", "pclk_dphytxrx",
                        "pclk_dphy_ref", "pclk_isp1",
-                       "pclk_dphyrx";
+                       "pclk_dphyrx", "pclk_mipi_dsi",
+                       "mipi_dphy_cfg";
                pinctrl-names =
                        "cif_clkout","isp_dvp8bit0", "isp_mipi_fl",
                        "isp_mipi_fl_prefl", "isp_flash_as_gpio",
                        "isp_flash_as_trigger_out";
                pinctrl-0 = <&cif_clkout>;
-               pinctrl-1 = <&cif_clkout &isp_dvp_d0d7>;
+               pinctrl-1 = <&isp_dvp_d0d7>;
                pinctrl-2 = <&cif_clkout>;
-               pinctrl-3 = <&cif_clkout &isp_prelight>;
+               pinctrl-3 = <&isp_prelight>;
                pinctrl-4 = <&isp_flash_trigger_as_gpio>;
                pinctrl-5 = <&isp_flash_trigger>;
                rockchip,isp,mipiphy = <2>;
@@ -491,9 +493,7 @@
                        /*cif_href*/
                        <2 9 RK_FUNC_3 &pcfg_pull_none>,
                        /*cif_clkin*/
-                       <2 10 RK_FUNC_3 &pcfg_pull_none>,
-                       /*cif_clkout*/
-                       <2 11 RK_FUNC_3 &pcfg_pull_none>;
+                       <2 10 RK_FUNC_3 &pcfg_pull_none>;
                };
 
                isp_shutter: isp-shutter {