Update size of inst correctly with segment override.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57414 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index ab57e3d018ce348d8f270882da3675ae42a621be..e08688bae32d2b1198081ca698c7b5172a4ba1aa 100644 (file)
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -420,6 +420,8 @@ void Emitter::emitInstruction(const MachineInstr &MI,
   case X86II::GS:
     MCE.emitByte(0x65);
     break;
+  default: assert(0 && "Invalid segment!");
+  case 0: break;  // No segment override!
   }
 
   // Emit the repeat opcode prefix as needed.

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 87c866a286a93dfd96fbce59428bb6844a8c994d..d2e2cf1efc055811ff593d0aa092c653a68663f1 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -2668,6 +2668,16 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
   // Emit the lock opcode prefix as needed.
   if (Desc->TSFlags & X86II::LOCK) ++FinalSize;
 
+  // Emit segment overrid opcode prefix as needed.
+  switch (Desc->TSFlags & X86II::SegOvrMask) {
+  case X86II::FS:
+  case X86II::GS:
+   ++FinalSize;
+   break;
+  default: assert(0 && "Invalid segment!");
+  case 0: break;  // No segment override!
+  }
+
   // Emit the repeat opcode prefix as needed.
   if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) ++FinalSize;