BT memory operands load from their address operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td
index 6e284a63194ca2e4f7d349a38922131112033eec..065fd8dd2fa543cc6e440cbde691548ce1351a51 100644 (file)
--- a/lib/Target/X86/X86Instr64bit.td
+++ b/lib/Target/X86/X86Instr64bit.td
@@ -927,7 +927,7 @@ def BT64rr : RI<0xA3, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
                 (implicit EFLAGS)]>;
 def BT64mr : RI<0xA3, MRMSrcMem, (outs), (ins i64mem:$src1, GR64:$src2),
                "bt{q}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR64:$src2),
+               [(X86bt (loadi64 addr:$src1), GR64:$src2),
                 (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 4d27f31a18aa9d3695faad77f43aed5d3f771cce..4d22c3cfc291573efa75d1a0e5e8f7fc7fc7059b 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2665,11 +2665,11 @@ def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2),
                 (implicit EFLAGS)]>;
 def BT16mr : I<0xA3, MRMSrcMem, (outs), (ins i16mem:$src1, GR16:$src2),
                "bt{w}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR16:$src2),
+               [(X86bt (loadi16 addr:$src1), GR16:$src2),
                 (implicit EFLAGS)]>, OpSize;
 def BT32mr : I<0xA3, MRMSrcMem, (outs), (ins i32mem:$src1, GR32:$src2),
                "bt{l}\t{$src2, $src1|$src1, $src2}",
-               [(X86bt addr:$src1, GR32:$src2),
+               [(X86bt (loadi32 addr:$src1), GR32:$src2),
                 (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]