pd: rockchip: add virtual pd clks

diff --git a/arch/arm/boot/dts/rk3288-clocks.dtsi b/arch/arm/boot/dts/rk3288-clocks.dtsi
index 8f3ba98f019df03d29f1757ee5862d38069b1199..379433bc7e06496bb0971a25213ba7e620ea7c32 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-clocks.dtsi
+++ b/arch/arm/boot/dts/rk3288-clocks.dtsi
@@ -238,6 +238,86 @@
                                #clock-cells = <0>;
                        };
 
+                       pd_edp: pd_edp {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_edp";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_vop0: pd_vop0 {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_vop0";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_vop1: pd_vop1 {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_vop1";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_isp: pd_isp {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_isp";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_iep: pd_iep {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_iep";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_rga: pd_rga {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_rga";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_mipicsi: pd_mipicsi {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_mipicsi";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_mipidsi: pd_mipidsi {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_mipidsi";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_lvds: pd_lvds {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_lvds";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
+                       pd_hdmi: pd_hdmi {
+                               compatible = "rockchip,rk-pd-clock";
+                               clocks = <&pd_vio>;
+                               clock-output-names = "pd_hdmi";
+                               rockchip,pd-id = <CLK_PD_VIRT>;
+                               #clock-cells = <0>;
+                       };
+
                };
 
 

diff --git a/drivers/clk/rockchip/clk-pd.c b/drivers/clk/rockchip/clk-pd.c
index 6c76fcb8b171745d7aa8df37a2886858ecf682f4..cf58abadf08aeab742b2303387cced28a086e477 100644 (file)
--- a/drivers/clk/rockchip/clk-pd.c
+++ b/drivers/clk/rockchip/clk-pd.c
@@ -44,6 +44,11 @@ const struct clk_ops clk_pd_ops = {
        .is_enabled = clk_pd_is_enabled,
 };
 
+const struct clk_ops clk_pd_virt_ops = {
+
+};
+
+
 struct clk *rk_clk_register_pd(struct device *dev, const char *name,
                const char *parent_name, unsigned long flags, 
                u32 pd_id, spinlock_t *lock)
@@ -64,7 +69,11 @@ struct clk *rk_clk_register_pd(struct device *dev, const char *name,
        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = (parent_name ? &parent_name: NULL);
        init.num_parents = (parent_name ? 1 : 0);
-       init.ops = &clk_pd_ops;
+
+       if(pd_id == CLK_PD_VIRT)
+               init.ops = &clk_pd_virt_ops;
+       else
+               init.ops = &clk_pd_ops;
 
        /* struct clk_pd assignments */
        pd->id= pd_id;

diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 72c8b04a522300d224d5ff4dc12c4d9ac68f5312..67136aad7da692d8214ed91a8b97ee9193d5fd94 100755 (executable)
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -1112,7 +1112,7 @@ static int __init rkclk_init_pd(struct device_node *np)
                        rkclk->clk_name = pd_info->clk_name;
                        rkclk->pd_info = pd_info;
                        rkclk->clk_type = RKCLK_PD_TYPE;
-                       rkclk->flags = CLK_IS_ROOT;
+                       rkclk->flags = 0;
                        clk_debug("%s: creat %s\n", __func__, rkclk->clk_name);
                        list_add_tail(&rkclk->node, &rk_clks);
                }

diff --git a/include/dt-bindings/clock/rockchip.h b/include/dt-bindings/clock/rockchip.h
index 7e4a970e4912709885c40ef4fb98314904406e40..eb46c55dbad5e798a89fdfcd04a3043ed9f35d55 100644 (file)
--- a/include/dt-bindings/clock/rockchip.h
+++ b/include/dt-bindings/clock/rockchip.h
@@ -68,6 +68,7 @@
 #define CLK_PD_SCU             11
 #define CLK_PD_VIDEO           12
 #define CLK_PD_VIO             13
+#define CLK_PD_VIRT            255
 
 
 #endif /* _DT_BINDINGS_CLOCK_ROCKCHIP_H */