swj add pwm reinit function for reboot

diff --git a/arch/arm/mach-rk29/reset.c b/arch/arm/mach-rk29/reset.c
index 77b6fb8c3144227309e1b34fcb0551ef088e78e8..24991fc8895283340c8b49f40318c92be7ed5544 100644 (file)
--- a/arch/arm/mach-rk29/reset.c
+++ b/arch/arm/mach-rk29/reset.c
@@ -4,6 +4,22 @@
 #include <asm/cacheflush.h>\r
 #include <mach/rk29_iomap.h>\r
 #include <mach/cru.h>\r
+#include <linux/clk.h>\r
+\r
+#include <linux/mm.h>\r
+#include <linux/sched.h>\r
+#include <linux/mmzone.h>\r
+#include <linux/rtc.h>\r
+#include <asm/tlb.h>\r
+#include <asm/traps.h>\r
+#include <asm/sections.h>\r
+#include <asm/mach/arch.h>\r
+#include <asm/mach/map.h>\r
+#include <asm/stacktrace.h>\r
+\r
+\r
+\r
+\r
 \r
 #define cru_readl(offset)      readl(RK29_CRU_BASE + offset)\r
 #define cru_writel(v, offset)  do { writel(v, RK29_CRU_BASE + offset); readl(RK29_CRU_BASE + offset); } while (0)\r
@@ -15,12 +31,29 @@ static inline void delay_500ns(void)
                barrier();\r
 }\r
 \r
+static void pwm2gpiodefault(void)\r
+{\r
+       #define     REG_FILE_BASE_ADDR         RK29_GRF_BASE\r
+       volatile unsigned int * pGRF_GPIO2L_IOMUX =  (volatile unsigned int *)(REG_FILE_BASE_ADDR + 0x58);\r
+       #define     GPIO2_BASE_ADDR            RK29_GPIO2_BASE\r
+       volatile unsigned int *pGPIO2_DIR = (volatile unsigned int *)(GPIO2_BASE_ADDR + 0x4);\r
+       volatile unsigned int *pGPIO2_LEVEL = (volatile unsigned int *)GPIO2_BASE_ADDR;\r
+\r
+       // iomux pwm2 to gpio2_a[3]\r
+       *pGRF_GPIO2L_IOMUX &= ~(0x3<<6);\r
+       // set gpio to input\r
+       *pGPIO2_DIR &= ~(0x1<<3);\r
+} \r
+\r
+\r
 void rk29_arch_reset(int mode, const char *cmd)\r
 {\r
        u32 pll, reg;\r
 \r
        local_irq_disable();\r
        local_fiq_disable();\r
+       \r
+       pwm2gpiodefault();\r
 \r
        cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_CPU_MODE_MASK) | CRU_CPU_MODE_SLOW, CRU_MODE_CON);\r
 \r
@@ -68,6 +101,8 @@ void rk29_arch_reset(int mode, const char *cmd)
            "bic        r0, %0, #(1 << 0)       @disable mmu\n\t"\r
            "bic        r0, %0, #(1 << 12)      @disable I CACHE\n\t"\r
            "bic        r0, %0, #(1 << 2)       @disable D DACHE\n\t"\r
+           "bic        r0, %0, #(1 << 11)      @disable \n\t"\r
+            "bic        r0, %0, #(1 << 28)      @disable \n\t"\r
            "mcr        p15, 0, %0, c1, c0, 0\n\t"\r
 //         "mcr        p15, 0, %0, c8, c7, 0   @ invalidate whole TLB\n\t"\r
 //         "mcr        p15, 0, %0, c7, c5, 6   @ invalidate BTC\n\t"\r
@@ -81,3 +116,4 @@ void rk29_arch_reset(int mode, const char *cmd)
            "mov        pc, #0" : : "r" (reg));\r
 }\r
 \r
+\r