; SI: buffer_load_dwordx2
; SI: v_bfe_u32 [[EXP:v[0-9]+]], v{{[0-9]+}}, 20, 11
-; SI: v_not_b32_e32
-; SI: v_not_b32_e32
+; SI-DAG: v_not_b32_e32
+; SI-DAG: v_not_b32_e32
-; SI: v_cmp_eq_i32
+; SI-DAG: v_cmp_eq_i32
-; SI: s_mov_b32 [[BFIMASK:s[0-9]+]], 0x7fffffff
-; SI: v_cmp_lt_i32_e64
-; SI: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[BFIMASK]]
+; SI-DAG: s_mov_b32 [[BFIMASK:s[0-9]+]], 0x7fffffff
+; SI-DAG: v_cmp_lt_i32_e64
+; SI-DAG: v_bfi_b32 [[COPYSIGN:v[0-9]+]], [[BFIMASK]]
-; SI: v_cmp_gt_i32_e64
+; SI-DAG: v_cmp_gt_i32_e64
; SI: buffer_store_dwordx2
}
; SI-LABEL: {{^}}s_sext_i1_to_i64:
-; SI: v_cndmask_b32_e64
-; SI: v_cndmask_b32_e64
+; SI: v_cndmask_b32_e64 v[[LOREG:[0-9]+]], 0, -1, vcc
+; SI: v_mov_b32_e32 v[[HIREG:[0-9]+]], v[[LOREG]]
+; SI: buffer_store_dwordx2 v{{\[}}[[LOREG]]:[[HIREG]]{{\]}}
; SI: s_endpgm
define void @s_sext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
%cmp = icmp eq i32 %a, %b