drm/nouveau: give a slightly larger pci(e)gart aperture on all chipsets
authorBen Skeggs <bskeggs@redhat.com>
Tue, 27 Mar 2012 05:15:18 +0000 (15:15 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 24 May 2012 06:31:38 +0000 (16:31 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_sgdma.c
drivers/gpu/drm/nouveau/nv04_instmem.c

index 27aac9ada73aa78b988d3511ea8942d5e57c9cc9..38483a042bc22828026764b0e2a4817ba01e54de 100644 (file)
@@ -341,10 +341,10 @@ nouveau_sgdma_init(struct drm_device *dev)
        u32 aper_size, align;
        int ret;
 
-       if (dev_priv->card_type >= NV_40 && pci_is_pcie(dev->pdev))
+       if (dev_priv->card_type >= NV_40)
                aper_size = 512 * 1024 * 1024;
        else
-               aper_size = 64 * 1024 * 1024;
+               aper_size = 128 * 1024 * 1024;
 
        /* Dear NVIDIA, NV44+ would like proper present bits in PTEs for
         * christmas.  The cards before it have them, the cards after
index c1248e0740a304947a1170c0a822edd5f43ffe65..1acc626f74b02636acc83b70269224ed0a92de96 100644 (file)
@@ -41,12 +41,8 @@ int nv04_instmem_init(struct drm_device *dev)
                rsvd += 16 * 1024;
                rsvd *= dev_priv->engine.fifo.channels;
 
-               /* pciegart table */
-               if (pci_is_pcie(dev->pdev))
-                       rsvd += 512 * 1024;
-
-               /* object storage */
-               rsvd += 512 * 1024;
+               rsvd += 512 * 1024; /* pci(e)gart table */
+               rsvd += 512 * 1024; /* object storage */
 
                dev_priv->ramin_rsvd_vram = round_up(rsvd, 4096);
        } else {