Add patterns for integer negate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 49fd403a183d4576d9adbf985e40170eee3c615e..b08d0423fcd8c58e0451cc3355bb087e291ba7b8 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -340,6 +340,21 @@ def MOV64rmm  : Pseudo<(outs GR64:$from, GR64:$to), (ins riaddr:$dst),
 //===----------------------------------------------------------------------===//
 // Arithmetic Instructions
 
+let Defs = [PSW] in {
+def NEG32rr : Pseudo<(outs GR32:$dst), (ins GR32:$src),
+                     "lcr\t{$dst, $src}",
+                     [(set GR32:$dst, (ineg GR32:$src)),
+                      (implicit PSW)]>;
+def NEG64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src),
+                     "lcgr\t{$dst, $src}",
+                     [(set GR64:$dst, (ineg GR64:$src)),
+                      (implicit PSW)]>;
+def NEG64rr32 : Pseudo<(outs GR64:$dst), (ins GR32:$src),
+                       "lcgfr\t{$dst, $src}",
+                       [(set GR64:$dst, (ineg (sext GR32:$src))),
+                        (implicit PSW)]>;
+}
+
 let isTwoAddress = 1 in {
 
 let Defs = [PSW] in {

diff --git a/test/CodeGen/SystemZ/02-RetNeg.ll b/test/CodeGen/SystemZ/02-RetNeg.ll
new file mode 100644 (file)
index 0000000..0bfbc7f
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetNeg.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=systemz | grep lcgr | count 1
+
+define i64 @foo(i64 %a) {
+entry:
+    %c = sub i64 0, %a
+    ret i64 %c
+}
\ No newline at end of file

diff --git a/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll b/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll
new file mode 100644 (file)
index 0000000..fa83803
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=systemz | grep lcr | count 1
+
+define i32 @foo(i32 %a) {
+entry:
+    %c = sub i32 0, %a
+    ret i32 %c
+}
+